PIC18F27J13-I/ML Microchip Technology, PIC18F27J13-I/ML Datasheet - Page 2

IC PIC MCU 128KB FLASH 28QFN

PIC18F27J13-I/ML

Manufacturer Part Number
PIC18F27J13-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/ML

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J13-I/ML
Manufacturer:
MICROCHIP
Quantity:
4 000
PIC18F47J13 FAMILY
TABLE 2:
DS80503D-page 2
CTMU
Oscillator
Configurations
ADC
MSSP
MSSP
EUSART
Note 1:
Module
Only those issues indicated in the last column apply to the current silicon revision.
SILICON ISSUE SUMMARY
Constant
Current
Source
PLL
A/D
I
Mode
I
Reception
Enable/
Disable
2
2
C™
C Slave
Feature
Number
Item
1.
2.
3.
4.
5.
6.
Band gap must be manually enabled before
using the CTMU.
PLL can not be enabled unless the 8 or
4 MHz INTOSC option is set.
ANx pin may output a pull-up pulse during
acquisition.
If a Stop condition occurs in the middle of an
address or data reception, there will be
issues with the SCL clock stream and RCEN
bit.
In I
problems receiving correct data.
If interrupts are enabled, disabling and
re-enabling the module requires a 2 T
delay.
2
C slave reception, the module may have
Issue Summary
CY
 2011 Microchip Technology Inc.
A1
Affected Revisions
X
X
X
X
X
X
(1)

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