AT32UC3L064-AUR Atmel, AT32UC3L064-AUR Datasheet - Page 63

• Manufacturer Part Number: AT32UC3L064-AUR
• Description: IC MCU AVR32 64K FLASH 48TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3L064-AUR

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.98 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 50MHz
• Number Of I /o: 36
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.2.11
32099AS–AVR32–06/09
PWMA
4. TWI pads are not SMBUS compatible
5. PA21, PB04, and PB05 are not 5V tolerant
6. PB04 SMBALERT function should not be used
7. TWI0.TWCK on PB05 is non-functional
8. TWIM STOP bit in IMR always read as zero
1. PARAMETER register reads 0x2424
2. Open Drain mode does not work
3. VERSION register reads 0x100
4. Writing to the duty cycle registers when the timebase counter overflows can give
When the device is in Stop, DeepStop or Static sleep modes, address reception will not
wake device if both CR.SOAM and CR.STREN are set.
Fix/workaround
Do not set both CR.STREN and CR.SOAM if the device needs to wake from deep sleep.
The TWI pads draws current when the pins are supplied with 3.3V and the part is left
unpowered.
Fix/workaround
None.
Pins PA21, PB04, and PB05 are only 3.3 V tolerant.
Fix/workaround
None.
The SMBALERT function from TWIMS0 should not be selected on pin PB04.
Fix/workaround
None.
TWI0.TWCK on PB05 is non-functional.
Fix/workaround
Use TWI0.TWCK on other pins.
The STOP bit in IMR always reads as zero.
Fix/workaround
None.
The PARAMETER register reads 0x2424 instead of 0x24.
Fix/Workaround
None.
The open drain mode does not work.
Fix/workaround
None.
The VERSION register reads 0x100 instead of 0x101.
Fix/Workaround
None.
undefined result
The duty cycle registers will be corrupted if written when the timebase counter overflows. If
the duty cycle registers are written exactly when the timebase counter overflows at TOP, the
duty cycle registers may become corrupted.
Fix/workaround
AT32UC3L
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