PIC24FJ256GA106T-I/PT Microchip Technology, PIC24FJ256GA106T-I/PT Datasheet - Page 53

• Manufacturer Part Number: PIC24FJ256GA106T-I/PT
• Description: IC PIC MCU FLASH 256K 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GA106T-I/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• A/d Bit Size: 10 bit
• A/d Channels Available: 16
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2 V
• Width: 10 mm
• For Use With: MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164327 - MODULE SKT FOR 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC24FJ256GA106T-I/PTTR

TABLE 5-5:
5.4.2
After
programmed to executive memory using ICSP, it must
be verified. Verification is performed by reading out the
contents of executive memory and comparing it with
the image of the programming executive stored in the
programmer.
TABLE 5-6:
 2010 Microchip Technology Inc.
Step 14: Repeat Steps 8 through 13 until all 16 rows of executive memory have been programmed.
Step 1: Exit the Reset vector.
Step 2: Initialize TBLPAG and the Read Pointer (W6) for TBLRD instruction.
Step 3: Initialize the Write Pointer (W7) to point to the VISI register.
Step 4: Read and clock out the contents of the next two locations of executive memory, through the VISI register,
Step 5: Reset the device internal PC.
Step 6: Repeat Steps 4 and 5 until all 1024 instruction words of executive memory are read.
Command
Command
(Binary)
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
0000
0000
0001
0000
0000
0000
the
using the REGOUT command.
PROGRAMMING VERIFICATION
programming
PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED)
READING EXECUTIVE MEMORY
000000
040200
000000
200800
8802A0
EB0300
207847
000000
BA0B96
000000
000000
<VISI>
000000
BADBB6
000000
000000
BAD3D6
000000
000000
<VISI>
000000
BA0BB6
000000
000000
<VISI>
000000
040200
000000
(Hex)
Data
(Hex)
Data
executive
NOP
GOTO
NOP
MOV
MOV
CLR
MOV
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register
NOP
TBLRDH.B [W6++], [W7++]
NOP
NOP
TBLRDH.B [++W6], [W7--]
NOP
NOP
Clock out contents of VISI register
NOP
TBLRDL
NOP
NOP
Clock out contents of VISI register
NOP
GOTO
NOP
PIC24FJXXXDA1/DA2/GB2/GA3
0x200
#0x80, W0
W0, TBLPAG
W6
#VISI, W7
[W6], [W7]
[W6++], [W7]
0x200
has
been
Reading the contents of executive memory can be
performed using the same technique described in
Section 3.8 “Reading Code
A procedure for reading executive memory is provided
in
is set to 80h, such that executive memory may be read.
The last eight words of executive memory should be
verified with stored values of the Diagnostic and
Calibration Words to ensure accuracy.
Table
Description
Description
5-6. Note that in Step 2, the TBLPAG register
Memory”.
DS39970B-page 53