PIC24FJ128GA110-E/PT Microchip Technology, PIC24FJ128GA110-E/PT Datasheet - Page 301

• Manufacturer Part Number: PIC24FJ128GA110-E/PT
• Description: IC PIC MCU FLASH 128KB 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA110-E/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (43K x 24)
• Package / Case: 100-TFQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Revision A (December 2007)
Original data sheet for the PIC24FJ256GA110 family of
devices.
Revision B (February 2008)
Updates to Section 28.0 “Electrical Characteristics”
and minor edits to text throughout document.
Revision C (April 2009)
Updates to all Pin Diagrams to reflect the correct order
of priority for multiplexed peripherals and adds the
ASCK1 pin function.
Adds packaging information for the new 64-pin QFN
package to Section 29.0 “Packaging Information”
and the Product Information System.
Updates Section 5.0 “Flash Program Memory” with
revised code examples in assembler and new code
examples in C.
Updates Section 6.2 “Device Reset Times” with
revised information, particularly Table 6-3.
Adds the INTTREG register to Section 4.0 “Memory
Organization” and Section 7.0 “Interrupt Controller”.
Makes several additions and changes to Section 10.0
“I/O Ports”, including:
• revision of Section 10.4.2.1 “Peripheral Pin
• addition of Section 10.4.3.3 “Alternate Fixed
• revisions to Table 10-3, “Selectable Output
• addition of the ALTRP register (and in Section 4.0
Updates Section 15.0 “Serial Peripheral Interface
(SPI)” to include references to the ASCK1 pin function.
Updates Section 20.0
Redundancy Check (CRC) Generator” with new
Interface”.
Updates Section 21.0 “10-Bit High-Speed A/D Con-
verter” by changing all references to AD1CHS0 to
AD1CHS (as well as other locations in the document).
Also revises bit field descriptions in registers:
AD1CON3 (bits 7:0) and AD1CHS (bits 12:8).
Makes minor text edits to bit descriptions in
Section 22.0
(Register 22-1) and Section 24.0 “Charge Time
Measurement Unit (CTMU)” (Register 24-1).
Updates Section 25.2 “On-Chip Voltage Regulator”
with revised text on the operation of the regulator
during POR and Standby mode.
 2009 Microchip Technology Inc.
illustrations and a revised Section 20.1 “User
Select Function Priority”
Pin Mapping”
Sources”
“Memory Organization”)
“Triple
REVISION HISTORY
“Programmable
Comparator
Module”
PIC24FJ256GA110 FAMILY
Cyclic
Updates Section 25.5 “JTAG Interface” to remove
references to programming via the interface.
Makes multiple additions and changes to Section 28.0
“Electrical Characteristics”, including:
• DC current characteristics for extended
• New DC characteristics of V
• Addition of new V
• New AC characteristics for internal oscillator
• Combination of all Internal RC Accuracy
Makes other minor typographic corrections throughout
the text.
Revision D (December 2009)
Updates Section 2.0 “Guidelines for Getting Started
with 16-bit Microcontrollers” with the most current
version.
Corrects annotations to the CN70 pin function in
Table 4-4 of Section 4.2.4 “SFR Space”.
Corrects annotations to remappable output function 30
in Register 10-37 of Section 10.4 “Peripheral Pin
Select”.
Corrects
WPFP<7:0> Configuration bits in Register 25-3 of
Section 25.1 “Configuration Bits”.
Updates Section 28.0 “Electrical Characteristics”
with additional data for I
occurrences of “DISVREG” throughout the chapter,
replacing them with “ENVREG” and the proper
V
Makes other minor typographic corrections throughout
the text.
DD
temperature operation (125°C)
I
start-up time (T
information into a single table
CNPD
/V
SS
connection information.
the
definitions
LPRC
PEW
)
specification for V
DD
for
BOR
at 60°C. Also corrects
, V
the
DS39905D-page 301
BG
, T
WPEND
BG
DDCORE
and
and