PIC16F74-I/PTG Microchip Technology, PIC16F74-I/PTG Datasheet - Page 256

IC MCU FLASH 4KX14 44TQFP

PIC16F74-I/PTG

Manufacturer Part Number
PIC16F74-I/PTG
Description
IC MCU FLASH 4KX14 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F74-I/PTG

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
PICmicro MID-RANGE MCU FAMILY
16.3
16.3.1
DS31016A-page 16-6
SPI is a trademark of Motorola Corporations.
Operation
SPI™ Mode
The SPI mode allows 8-bits of data to be synchronously transmitted and received simulta-
neously. To accomplish communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally a fourth pin may be used when in a slave mode of operation:
• Slave Select (SS)
When initializing the SPI, several options need to be specified. This is done by programming the
appropriate control bits in the SSPCON register (SSPCON<5:0>). These control bits allow the
following to be specified:
• Master Mode (SCK is the clock output)
• Slave Mode (SCK is the clock input)
• Clock Polarity (Output/Input data on the Rising/Falling edge of SCK)
• Clock Rate (Master mode only)
• Slave Select Mode (Slave mode only)
Figure 16-1
Figure 16-1: SSP Block Diagram (SPI Mode)
shows the block diagram of the SSP module, when in SPI mode.
SDI
SDO
SS
SCK
Read
SS Control
TRIS bit of SCK pin
Select
Edge
Enable
bit0
Select
Edge
SSPBUF reg
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
shift clock
Write
Prescaler
4, 16, 64
data bus
Internal
TMR2 output
1997 Microchip Technology Inc.
T
CY
2

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