PIC18F4525-E/P Microchip Technology, PIC18F4525-E/P Datasheet - Page 249

• Manufacturer Part Number: PIC18F4525-E/P
• Description: IC MCU FLASH 24KX16 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4525-E/P

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3986 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DB18F4620 - BOARD DAUGHTER ICEPIC3DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 22-1:
© 2008 Microchip Technology Inc.
HLVDCON VDIRMAG
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Name
Operation During Sleep
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
CMIF
CMIE
CMIP
Bit 6
—
IRVST
Bit 5
—
—
—
PIC18F2525/2620/4525/4620
HLVDEN
INT0IE
EEIE
EEIP
Bit 4
EEIF
HLVDL3
BCLIE
BCLIP
BCLIF
RBIE
22.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIF
HLVDIE
HLVDIP
Bit 2
HLVDL1
TMR3IE
TMR3IP
TMR3IF
INT0IF
Bit 1
HLVDL0
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0
DS39626E-page 247
on Page
Values
Reset
52
52
52
50
49