PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 165

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PIC18F87J11-I/PT

Manufacturer Part Number
PIC18F87J11-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87J11-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
11.2.3.1
When chip select is active and a read strobe occurs
(PMCS = 1 and PMRD = 1), the data from one of the
four output bytes is presented onto PMD<7:0>. Which
byte is read depends on the 2-bit address placed on
ADDR<1:0>. Table 11-2 shows the corresponding
output registers and their associated address.
FIGURE 11-7:
11.2.3.2
When chip select is active and a write strobe occurs
(PMCS = 1 and PMWR = 1), the data from PMD<7:0>
is captured into one of the four input buffer bytes.
Which byte is written depends on the 2-bit address
placed on ADDRL<1:0>. Table 11-2 shows the corre-
sponding input registers and their associated address.
FIGURE 11-8:
© 2009 Microchip Technology Inc.
PMD<7:0>
PMA<1:0>
PMD<7:0>
PMA<1:0>
PMWR
PMPIF
PMWR
PMPIF
PMCS
PMRD
PMRD
PMCS
OBE
IBF
READ FROM SLAVE PORT
WRITE TO SLAVE PORT
PARALLEL SLAVE PORT READ WAVEFORMS
PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1
Q1
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Q2
Q2
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Q3
Q3
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Q4
Q4
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Q1
Q1
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Q2
PIC18F87J11 FAMILY
Q2
When an output buffer is read, the corresponding
OBxE bit is set. The OBE flag bit is set when all the buf-
fers are empty. If any buffer is already empty (OBxE =
1), the next read to that buffer will generate an OBUF
event.
When an input buffer is written, the corresponding IBxF
bit is set. The IBF flag bit is set when all the buffers are
written. If any buffer is already written (IBxF = 1), the
next write strobe to that buffer will generate an OBUF
event and the byte will be discarded.
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Q3
Q3
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Q4
Q4
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Q1
Q1
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Q2
Q2
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DS39778D-page 165
Q3
Q3
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Q4
Q4

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