PIC16LC622-04I/SS Microchip Technology, PIC16LC622-04I/SS Datasheet - Page 36
![IC MCU OTP 2KX14 COMP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LC622-04I/SS
Manufacturer Part Number
PIC16LC622-04I/SS
Description
IC MCU OTP 2KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C620A-04SO.pdf
(128 pages)
Specifications of PIC16LC622-04I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
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PIC16C62X
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer, respectively (Figure 6-6). For simplicity, this
counter is being referred to as “prescaler” throughout
this data sheet. Note that there is only one prescaler
available which is mutually exclusive between the
Timer0 module and the Watchdog Timer. Thus, a
prescaler assignment for the Timer0 module means
that there is no prescaler for the Watchdog Timer and
vice-versa.
FIGURE 6-6:
DS30235J-page 34
CLKOUT (= Fosc/4)
WDT Enable bit
Note: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
T0CKI
Watchdog
pin
Timer
Prescaler
T0SE
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
0
1
PSA
M
U
X
0
1
T0CS
M
U
X
0
8-bit Prescaler
8-to-1MUX
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
The PSA and PS<2:0> bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing
MOVWF 1, BSF 1,x....etc.) will clear the prescaler.
When assigned to WDT, a CLRWDT instruction will clear
the prescaler along with the Watchdog Timer. The
prescaler is not readable or writable.
PSA
PS<2:0>
to
Cycles
SYNC
2
the
TMR0
2003 Microchip Technology Inc.
TMR0 reg
register
Data Bus
8
(e.g.,
Set flag bit T0IF
on Overflow
CLRF 1,
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