DSPIC30F2023-30I/PTD32 Microchip Technology, DSPIC30F2023-30I/PTD32 Datasheet - Page 204

• Manufacturer Part Number: DSPIC30F2023-30I/PTD32
• Description: IC DSPIC MCU/DSP 12K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2023-30I/PTD32

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q4035438

dsPIC30F1010/202X
REGISTER 18-3:
REGISTER 18-4:
DS70178C-page 202
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-8
bit 7-0
R/W-0
R/W-0
R/W-0
U-0
—
TSEQ7<3:0>: Tune Sequence value #7 bits
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
TSEQ6<3:0>: Tune Sequence value #6 bits
When PWM ROLL<2:0> = 110, this field is used to tune the FRC instead of TUN<3:0>
TSEQ5<3:0>: Tune Sequence value #5 bits
When PWM ROLL<2:0> = 101, this field is used to tune the FRC instead of TUN<3:0>
TSEQ4<3:0>: Tune Sequence value #4 bits
When PWM ROLL<2:0> = 100, this field is used to tune the FRC instead of TUN<3:0>
Unimplemented: Read as ‘0’
When PWM ROLL<2:0> = 111, this field is used to tune the FRC instead of TUN<3:0>
LFSR <14:8>: Most Significant 7 bits of the pseudo random FRC trim value bits
LFSR <7:0>:
R/W-0
R/W-0
R/W-0
R/W-0
OSCTUN2: OSCILLATOR TUNING REGISTER 2
LFSR: LINEAR FEEDBACK SHIFT REGISTER
TSEQ7<3:0>
TSEQ5<3:0>
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
Least Significant 8 bits of the pseudo random FRC trim value bits
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
LFSR<7:0>
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
LFSR<14:8>
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TSEQ6<3:0>
TSEQ4<3:0>
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0