ATXMEGA32D4-AU Atmel, ATXMEGA32D4-AU Datasheet - Page 10
![IC MCU AVR 32KB FLASH 100TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATXMEGA32D4-AU
Manufacturer Part Number
ATXMEGA32D4-AU
Description
IC MCU AVR 32KB FLASH 100TQFP
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATXMEGA16D4-AU.pdf
(105 pages)
Specifications of ATXMEGA32D4-AU
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATXMEGA32x
Core
AVR8
Data Bus Width
8 bit
3rd Party Development Tools
EWAVR, EWAVR-BL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATXMEGA32D4-AU
Manufacturer:
Atmel
Quantity:
123
Part Number:
ATXMEGA32D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
7. Memories
7.1
7.2
8135J–AVR–12/10
Features
Overview
•
•
•
•
The AVR architecture has two main memory spaces, the Program Memory and the Data Mem-
ory. In addition, the XMEGA D4 features an EEPROM Memory for non-volatile data storage. All
three memory spaces are linear and require no paging. The available memory size configura-
tions are shown in
memory signature row for calibration data, device identification, serial number etc.
Non-volatile memory spaces can be locked for further write or read/write operations. This pre-
vents unrestricted access to the application software.
Flash Program Memory
Data Memory
Production Signature Row Memory for factory programmed data
User Signature Row
– One linear address space
– In-System Programmable
– Self-Programming and Bootloader support
– Application Section for application code
– Application Table Section for application code or data storage
– Boot Section for application code or bootloader code
– Separate lock bits and protection for all sections
– One linear address space
– Single cycle access from CPU
– SRAM
– EEPROM
– I/O Memory
Byte and page accessible
Optional memory mapping for direct load and store
Configuration and Status registers for all peripherals and modules
Four bit-accessible General Purpose Register for global variables or flags
Device ID for each microcontroller device type
Serial number for each device
Oscillator calibration bytes
ADC and temperature sensor calibration data
One flash page in size
Can be read and written from software
Content is kept after chip erase
”Ordering Information” on page
2. In addition each device has a Flash
XMEGA D4
10