PIC24FJ64GB004-I/PT Microchip Technology, PIC24FJ64GB004-I/PT Datasheet - Page 46
![IC MCU 16BIT 64KB FLASH 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC24FJ64GB004-I/PT
Manufacturer Part Number
PIC24FJ64GB004-I/PT
Description
IC MCU 16BIT 64KB FLASH 44TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(48 pages)
2.PIC24FJ32GB002-ISO.pdf
(352 pages)
3.PIC24FJ32GB002-ISO.pdf
(12 pages)
4.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB004-I/PT
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
33
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
A/d Bit Size
10 bit
A/d Channels Available
13
Height
1 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GB004-I/PT
Manufacturer:
NEC
Quantity:
201
Company:
Part Number:
PIC24FJ64GB004-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ64GB004-I/PT
Manufacturer:
MICROHCIP
Quantity:
20 000
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GB002-ISO PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- Current page: 46 of 342
- Download datasheet (6Mb)
TABLE 4-24:
TABLE 4-25:
TABLE 4-26:
DSCON
DSWAKE
DSGPR0
DSGPR1
Legend:
Note 1:
RCON
OSCCON
CLKDIV
OSCTUN
REFOCON
Legend:
Note 1:
NVMCON
NVMKEY
Legend:
Note 1:
File Name
File Name
File Name
2:
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The Deep Sleep registers are only reset on a V
Addr
0760
0766
Addr
075A
075C
075E
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The Reset value of the RCON register is dependent on the type of Reset event. See Section 6.0 “Resets” for more information.
The Reset value of the OSCCON register is dependent on both the type of Reset event and the device configuration. See Section 8.0 “Oscillator Configuration” for more information.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
Addr
0740
074E
758
0742
0744
0748
SYSTEM REGISTER MAP
DEEP SLEEP REGISTER MAP
NVM REGISTER MAP
DSEN
Bit 15
Bit 15
TRAPR
ROEN
Bit 15
WR
—
—
ROI
—
—
IOPUWR
Bit 14
WREN
COSC2
Bit 14
DOZE2
Bit 14
—
—
—
—
—
WRERR
ROSSLP
Bit 13
Bit 13
COSC1
DOZE1
Bit 13
—
—
—
—
—
Bit 12
COSC0
DOZE0
ROSEL
Bit 12
Bit 12
—
—
—
—
—
—
DD
POR event.
Bit 11
RODIV3
DOZEN
Bit 11
Bit 11
—
—
—
—
—
—
—
Bit 10
RCDIV2
RODIV2
NOSC2
DPSLP
Bit 10
Bit 10
—
—
—
—
—
RCDIV1
RODIV1
Deep Sleep General Purpose Register 0
Deep Sleep General Purpose Register 1
NOSC1
Bit 9
Bit 9
Bit 9
—
—
CM
—
—
—
DSINT0
RCDIV0
RODIV0
PMSLP
NOSC0
Bit 8
Bit 8
—
Bit 8
—
—
—
CLKLOCK
DSFLT
CPDIV1
Bit 7
Bit 7
EXTR
Bit 7
—
—
—
—
ERASE
IOLOCK
CPDIV0
Bit 6
Bit 6
SWR
Bit 6
—
—
—
—
SWDTEN
Bit 5
Bit 5
PLLEN
LOCK
TUN5
Bit 5
—
—
—
—
NVMKEY Register<7:0>
DSWDT
Bit 4
Bit 4
WDTO
TUN4
—
Bit 4
—
—
—
—
NVMOP3 NVMOP2 NVMOP1 NVMOP0 0000
DSRTC
Bit 3
SLEEP
Bit 3
TUN3
Bit 3
—
CF
—
—
DSMCLR
POSCEN SOSCEN OSWEN
Bit 2
Bit 2
TUN2
Bit 2
IDLE
—
—
—
DSBOR RELEASE
Bit 1
Bit 1
TUN1
—
Bit 1
BOR
—
—
DSPOR
Bit 0
Bit 0
TUN0
Bit 0
POR
—
—
Resets
Resets
0000
Resets
0000
0001
0000
0000
Note 1
Note 2
0100
0000
0000
All
All
All
(1)
(1)
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