PIC18F67K90-I/PTRSL Microchip Technology, PIC18F67K90-I/PTRSL Datasheet - Page 283
![MCU PIC 128K FLASH XLP 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67K90-I/PTRSL
Manufacturer Part Number
PIC18F67K90-I/PTRSL
Description
MCU PIC 128K FLASH XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F67K90-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3828Byte
Cpu Speed
16MIPS
No. Of Timers
11
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM163030, DM180021, DM183026-2, DM183032, DV164131, MA180027
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K90-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
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20.3.2.3
Under firmware control, an internal reference for the
LCD bias voltages can be enabled. When enabled, the
source of this voltage can be V
When no internal reference is selected, the LCD
contrast control circuit is disabled and LCD bias must
be provided externally. Whenever the LCD module is
inactive (LCDA = 0), the internal reference will be
turned off.
20.3.2.4
The VLCD3, VLCD2 and VLCD1 pins provide the
ability for an external LCD bias network to be used
instead of the internal ladder. Use of the VLCDx pins
does not prevent use of the internal ladder.
Each VLCD pin has an independent control in the
LCDREF register, allowing access to any or all of the
LCD bias signals.
This architecture allows for maximum flexibility in
different applications. The VLCDx pins could be used
to add capacitors to the internal reference ladder for
increasing the drive capacity. For applications where
the internal contrast control is insufficient, the firmware
can choose to enable only the VLCD3 pin, allowing an
external contrast control circuit to use the internal
reference divider.
20.4
The LCD driver module can be configured into four
multiplex types:
• Static (only COM0 used)
• 1/2 multiplex (COM0 and COM1 are used)
• 1/3 multiplex (COM0, COM1 and COM2 are used)
• 1/4 multiplex (COM0, COM1, COM2 and COM3 are
2010 Microchip Technology Inc.
used)
LCD Multiplex Types
Internal Reference
VLCDx Pins
DD
.
Preliminary
PIC18F87K90 FAMILY
The LMUX<1:0> setting (LCDCON<1:0>) decides the
function of the PORTE<6:4> bits. (For details, see
Table 20-4.)
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive, the
TRIS setting of that pin is overridden.
TABLE 20-4:
20.5
The LCDSEx registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
a digital only pin. To configure the pin as a segment pin,
the corresponding bits in the LCDSEx registers must
be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEx
registers overrides any bit settings in the corresponding
TRIS register.
20.6
The LCDDATAx registers contain bits that define the
state of each pixel. Each bit defines one unique pixel.
Table 20-2 shows the correlation of each bit in the
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
LMUX<1:0> PORTE<6>
Note:
Note:
00
01
10
11
Segment Enables
Pixel Control
On a Power-on Reset, the LMUX<1:0>
bits are ‘00’.
On a Power-on Reset, these pins are
configured as digital I/O.
COM3 Driver COM2 Driver COM1 Driver
Digital I/O
Digital I/O
Digital I/O
PORTE<6:4> FUNCTION
COM2 Driver COM1 Driver
PORTE<5>
Digital I/O
Digital I/O
DS39957B-page 283
COM1 Driver
PORTE<4>
Digital I/O
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