AT32UC3B1128-AUT Atmel, AT32UC3B1128-AUT Datasheet - Page 558

• Manufacturer Part Number: AT32UC3B1128-AUT
• Description: IC MCU AVR32 128KB FLASH 48-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B1128-AUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 28
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Package: 48TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 28
• Interface Type: I2S/SPI/TWI/USART/USB
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• For Use With: ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

25.7.2
Name:
Access Type:
Offset:
Reset Value:
• SHTIM: Sample & Hold Time
• STARTUP: Start Up Time
• PRESCAL: Prescaler Rate Selection
• SLEEP: Sleep Mode
• LOWRES: Resolution
• TRGSEL: Trigger Selection
• TRGEN: Trigger Enable
32059K–03/2011
31
23
15
0
0
0
0
1
1
1
–
–
7
–
Sample & Hold Time = (SHTIM+3) / ADCClock
Startup Time = (STARTUP+1) * 8 / ADCClock
This Time should respect a minimal value. Refer to Electrical Characteristics section for details.
ADCClock = CLK_ADC / ( (PRESCAL+1) * 2 )
1: Sleep Mode is selected.
0: Normal Mode is selected.
1: 8-bit resolution is selected.
0: 10-bit resolution is selected.
1: The hardware trigger selected by the TRGSEL field is enabled.
0: The hardware triggers are disabled. Starting a conversion is only possible by software.
Mode Register
TRGSEL
30
22
14
0
0
1
1
0
0
1
MR
Read/Write
0x04
0x00000000
–
6
–
SLEEP
29
21
13
0
1
0
1
0
1
0
–
5
Selected TRGSEL
Internal Trigger 0, depending of chip integration
Internal Trigger 1, depending of chip integration
Internal Trigger 2, depending of chip integration
Internal Trigger 3, depending of chip integration
Internal Trigger 4, depending of chip integration
Internal Trigger 5, depending of chip integration
External trigger
LOWRES
28
20
12
–
4
PRESCAL
STARTUP
27
19
11
3
TRGSEL
26
18
10
2
SHTIM
25
17
9
1
AT32UC3B
TRGEN
24
16
8
0
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