AT32UC3B1128-AUR Atmel, AT32UC3B1128-AUR Datasheet - Page 626
![MCU AVR32 128K FLASH 48-TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3B1128-AUR
Manufacturer Part Number
AT32UC3B1128-AUR
Description
MCU AVR32 128K FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B1128-AUR
Package / Case
48-TQFP, 48-VQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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28.5.1
Table 28-10. Power Consumption for Different Sleep Modes for AT32UC3B064, AT32UC3B0128, AT32UC3B0256,
Notes:
Table 28-11. Power Consumption for Different Sleep Modes for AT32UC3B0512, AT32UC3B1512
32059J–12/2010
Mode
Active
Idle
Frozen
Standby
Stop
Deepstop
Static
Mode
Active
Idle
Frozen
1. Core frequency is generated from XIN0 using the PLL so that 140 MHz < f
Power Consumtion for Different Sleep Modes
Conditions
- CPU running a recursive Fibonacci Algorithm from flash and clocked from
PLL0 at f MHz.
- Voltage regulator is on.
- XIN0: external clock. Xin1 Stopped. XIN32 stopped.
- All peripheral clocks activated with a division by 8.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external pull-
up and Input pins are connected to GND
Same conditions at 60 MHz
See Active mode conditions
Same conditions at 60 MHz
See Active mode conditions
Same conditions at 60 MHz
See Active mode conditions
Same conditions at 60 MHz
- CPU running in sleep mode
- XIN0, Xin1 and XIN32 are stopped.
- All peripheral clocks are desactived.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external pull-
up and Input pins are connected to GND.
See Stop mode conditions
See Stop mode conditions
Conditions
- CPU running a recursive Fibonacci Algorithm from flash and clocked from
PLL0 at f MHz.
- Voltage regulator is on.
- XIN0: external clock. Xin1 Stopped. XIN32 stopped.
- All peripheral clocks activated with a division by 8.
- GPIOs are inactive with internal pull-up, JTAG unconnected with external
pull-up and Input pins are connected to GND
Same conditions at 60 MHz
See Active mode conditions
Same conditions at 60 MHz
See Active mode conditions
Same conditions at 60 MHz
AT32UC3B164, AT32UC3B1128, AT32UC3B1256
Voltage Regulator On
Voltage Regulator Off
PLL0
< 160 MHz and 10 MHz < f
0.0723xf(MHz)+0.156
0.146xf(MHz)+0.291
0.359xf(MHz)+1.53
0.058xf(MHz)+0.115
0.042xf(MHz)+0.115
0.117xf(MHz)+0.28
0.3xf(MHz)+0.443
Typ.
4.5
24
9
Typ.
37.8
24.9
18.5
13.9
7.3
3.6
2.7
8.9
AT32UC3B
XIN0
mA/MHz
mA/MHz
mA/MHz
< 12 MHz.
Unit
mA
mA
mA
mA/MHz
mA/MHz
mA/MHz
mA/MHz
Unit
mA
mA
mA
mA
µA
µA
µA
µA
626
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