DSPIC33FJ128MC706-E/PT Microchip Technology, DSPIC33FJ128MC706-E/PT Datasheet - Page 6
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DSPIC33FJ128MC706-E/PT
Manufacturer Part Number
DSPIC33FJ128MC706-E/PT
Description
IC DSPIC MCU/DSP 128K 64-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ128MC706-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
For Use With
MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Silicon Errata Issues
1. Module: Doze Mode
DS80447D-page 6
Note:
Enabling Doze mode slows down the CPU, but
allows peripherals to run at full speed. When the
CPU clock is slowed down by enabling Doze mode
(CLKDIV<11> = 1), any writes to a peripheral SFR
can cause other updates to that register to cease
to function for the duration of the current CPU
clock cycle. This is only an issue if the CPU
attempts to write to the same register as a
peripheral while in Doze mode.
For instance, if the ADC module is active and Doze
mode is enabled, the main program should avoid
writing to ADCCONx registers because these
registers are being used by the ADC module. If the
CPU does make writes before the ADC module
does, then any attempts by the ADC module to
write to these registers will fail.
Work around
In Doze mode, avoid writing code that will modify
SFRs that may be written to by enabled
peripherals.
Affected Silicon Revisions
A2
X
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A4).
A3
X
A4
X
© 2010 Microchip Technology Inc.