DSPIC33FJ64GP204-I/PT Microchip Technology, DSPIC33FJ64GP204-I/PT Datasheet - Page 372

IC DSPIC MCU/DSP 64K 44-TQFP

DSPIC33FJ64GP204-I/PT

Manufacturer Part Number
DSPIC33FJ64GP204-I/PT
Description
IC DSPIC MCU/DSP 64K 44-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP204-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Core Frequency
40MHz
Embedded Interface Type
ECAN, I2C, SPI, UART
No. Of I/o's
35
Flash Memory Size
64KB
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ64GP204-I/PT
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Quantity:
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Part Number:
DSPIC33FJ64GP204-I/PT
Manufacturer:
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Part Number:
DSPIC33FJ64GP204-I/PT
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Quantity:
10 000
Reset
Reset Sequence.................................................................. 77
Resets ................................................................................. 69
DS70292B-page 370
DMAxREQ (DMA Channel x IRQ Select) ................. 123
DMAxSTA (DMA Channel x RAM Start
DMAxSTB (DMA Channel x RAM Start
DSADR (Most Recent DMA RAM Address).............. 129
I2CxCON (I2Cx Control) ........................................... 197
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 201
I2CxSTAT (I2Cx Status) ........................................... 199
IFS0 (Interrupt Flag Status 0) ............................... 87, 94
IFS1 (Interrupt Flag Status 1) ............................... 89, 96
IFS2 (Interrupt Flag Status 2) ............................... 91, 98
IFS3 (Interrupt Flag Status 3) ............................... 92, 99
IFS4 (Interrupt Flag Status 4) ............................. 93, 100
INTCON1 (Interrupt Control 1) .................................... 84
INTCON2 (Interrupt Control 2) .................................... 86
INTTREG Interrupt Control and Status Register....... 117
IPC0 (Interrupt Priority Control 0) ............................. 101
IPC1 (Interrupt Priority Control 1) ............................. 102
IPC11 (Interrupt Priority Control 11) ......................... 111
IPC14 (Interrupt Priority Control 14) ......................... 112
IPC15 (Interrupt Priority Control 15) ......................... 113
IPC16 (Interrupt Priority Control 16) ......................... 114
IPC17 (Interrupt Priority Control 17) ......................... 115
IPC18 (Interrupt Priority Control 18) ......................... 116
IPC2 (Interrupt Priority Control 2) ............................. 103
IPC3 (Interrupt Priority Control 3) ............................. 104
IPC4 (Interrupt Priority Control 4) ............................. 105
IPC5 (Interrupt Priority Control 5) ............................. 106
IPC6 (Interrupt Priority Control 6) ............................. 107
IPC7 (Interrupt Priority Control 7) ............................. 108
IPC8 (Interrupt Priority Control 8) ............................. 109
IPC9 (Interrupt Priority Control 9) ............................. 110
NVMCON (Flash Memory Control) ............................. 65
NVMKEY (Nonvolatile Memory Key) .......................... 66
OCxCON (Output Compare x Control) ..................... 187
OSCCON (Oscillator Control) ................................... 135
OSCTUN (FRC Oscillator Tuning) ............................ 139
PLLFBD (PLL Feedback Divisor) .............................. 138
PxTCON (PWM Time Base Control)......... 255, 256, 257
RCON (Reset Control) ................................................ 70
RSCON (DCI Receive Slot Control).......................... 240
SPIxCON1 (SPIx Control 1) ...................................... 191
SPIxCON2 (SPIx Control 2) ...................................... 193
SPIxSTAT (SPIx Status and Control) ....................... 190
SR (CPU Status) ................................................... 20, 82
T1CON (Timer1 Control)........................................... 176
TCxCON (Input Capture x Control) ........................... 184
TSCON (DCI Transmit Slot Control) ......................... 240
TxCON (Type B Time Base Control) ........................ 180
TyCON (Type C Time Base Control) ........................ 181
UxMODE (UARTx Mode) .......................................... 204
UxSTA (UARTx Status and Control) ......................... 206
Illegal Opcode ....................................................... 69, 76
Trap Conflict.......................................................... 75, 76
Uninitialized W Register ........................................ 69, 76
Address A) ........................................................ 124
Address B) ........................................................ 124
Preliminary
S
Serial Peripheral Interface (SPI) ....................................... 189
Software Reset Instruction (SWR) ...................................... 75
Software Simulator (MPLAB SIM) .................................... 306
Software Stack Pointer, Frame Pointer
Special Features of the CPU ............................................ 287
SPI Module
Symbols Used in Opcode Descriptions ............................ 298
System Control
T
Temperature and Voltage Specifications
Timer1............................................................................... 175
Timer2/3............................................................................ 177
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
CALLL Stack Frame ................................................... 54
SPI1 Register Map...................................................... 41
Register Map .............................................................. 53
AC............................................................................. 319
CLKO and I/O ........................................................... 322
10-bit A/D Conversion (CHPS = 01,
12-bit A/D Conversion (ASAM = 0,
Brown-out Situations................................................... 75
DCI AC-Link Mode.................................................... 340
DCI Multi -Channel, I
ECAN I/O .................................................................. 342
External Clock........................................................... 320
I2Cx Bus Data (Master Mode) .................................. 334
I2Cx Bus Data (Slave Mode) .................................... 336
I2Cx Bus Start/Stop Bits (Master Mode)................... 334
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 336
Input Capture (CAPx) ............................................... 327
OC/PWM................................................................... 328
Output Compare (OCx)............................................. 327
Reset, Watchdog Timer, Oscillator Start-up
SPIx Master Mode (CKE = 0) ................................... 329
SPIx Master Mode (CKE = 1) ................................... 330
SPIx Slave Mode (CKE = 0) ..................................... 331
SPIx Slave Mode (CKE = 1) ..................................... 332
Timer1, 2 and 3 External Clock ................................ 325
CLKO and I/O ........................................................... 322
DCI AC-Link Mode.................................................... 341
DCI Multi-Channel, I
External Clock........................................................... 320
Input Capture ............................................................ 327
10-bit A/D Conversion Requirements ....................... 349
12-bit A/D Conversion Requirements ....................... 347
CAN I/O Requirements ............................................. 342
I2Cx Bus Data Requirements (Master Mode)........... 335
I2Cx Bus Data Requirements (Slave Mode)............. 337
Output Compare Requirements................................ 327
PLL Clock ................................................................. 321
QEI External Clock Requirements ............................ 326
QEI Index Pulse Requirements ................................ 329
Reset, Watchdog Timer, Oscillator Start-up
Simple OC/PWM Mode Requirements ..................... 328
SPIx Master Mode (CKE = 0) Requirements............ 329
SPIx Master Mode (CKE = 1) Requirements............ 330
SIMSAM = 0, ASAM = 0, SSRC = 000)............ 348
SSRC = 000) .................................................... 346
Timer and Power-up Timer............................... 323
Timer, Power-up Timer and Brown-out
Reset Requirements......................................... 324
2
2
S Modes.................................. 339
© 2008 Microchip Technology Inc.
S Modes................................. 338

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