AT89C51RB2-SLRUM Atmel, AT89C51RB2-SLRUM Datasheet - Page 125
![MCU 8051 16K FLASH 5V 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT89C51RB2-SLRUM
Manufacturer Part Number
AT89C51RB2-SLRUM
Description
MCU 8051 16K FLASH 5V 44-PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT89C51RB2-RLTIL.pdf
(127 pages)
Specifications of AT89C51RB2-SLRUM
Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
For Use With
AT89STK-11 - KIT STARTER FOR AT89C51RX2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51RB2-SLRUM
Manufacturer:
Atmel
Quantity:
500
xxxxA–8051–10/06
Interrupt System ................................................................................. 55
Keyboard Interface ............................................................................. 64
Serial Port Interface (SPI) ................................................................... 68
Hardware Watchdog Timer ................................................................ 77
ONCE
Power Management ............................................................................ 80
Power-off Flag ..................................................................................... 84
Reduced EMI Mode ............................................................................. 85
Flash EEPROM Memory ..................................................................... 86
Electrical Characteristics ................................................................. 107
Registers............................................................................................................. 47
Baud Rate Selection for UART for Mode 1 and 3............................................... 47
UART Registers.................................................................................................. 50
Registers............................................................................................................. 56
Interrupt Sources and Vector Addresses............................................................ 63
Registers............................................................................................................. 65
Features.............................................................................................................. 68
Signal Description............................................................................................... 68
Functional Description ........................................................................................ 70
Using the WDT ................................................................................................... 77
WDT During Power-down and Idle ..................................................................... 78
Reset .................................................................................................................. 80
Reset Recommendation to Prevent Flash Corruption ........................................ 82
Idle Mode ............................................................................................................ 82
Power-down Mode.............................................................................................. 82
Features.............................................................................................................. 86
Flash Programming and Erasure ........................................................................ 86
Flash Registers and Memory Map...................................................................... 87
Flash Memory Status.......................................................................................... 90
Memory Organization ......................................................................................... 90
Bootloader Architecture ...................................................................................... 91
ISP Protocol Description..................................................................................... 95
Functional Description ........................................................................................ 96
Flow Description ................................................................................................. 97
API Call Description.......................................................................................... 105
Absolute Maximum Ratings .............................................................................. 107
™
Mode (ON Chip Emulation) .................................................. 79
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