PIC16F876-10E/SP Microchip Technology, PIC16F876-10E/SP Datasheet - Page 273
![IC MCU FLASH 8KX14 EE 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16F876-10E/SP
Manufacturer Part Number
PIC16F876-10E/SP
Description
IC MCU FLASH 8KX14 EE 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F876-10E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87610E/SP
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 273 of 688
- Download datasheet (3Mb)
16.5
16.5.1
1997 Microchip Technology Inc.
SSP Module / Basic SSP Module Compatibility
Initialization
Example 16-2: SPI Master Mode Initialization
When changing from the SSP Module to the Basic SSP module, the SSPSTAT register contains
two additional control bits. These bits are:
• SMP, SPI data input sample phase
• CKE, SPI Clock Edge Select
To be compatible with the SPI of the Basic SSP module, these bits must be appropriately config-
ured. If these bits are not at the states shown in
be expected. If the SSP module uses a different configuration then shown in
Basic SSP module can not be used to implement that mode. That mode may be implemented in
software.
Table 16-4: New Bit States for Compatibility
Basic SSP Module
CLRF
CLRF
MOVLW
MOVWF
BSF
BSF
BCF
BSF
MOVLW
MOVWF
CKP
1
0
STATUS
SSPSTAT
0x31
SSPCON
STATUS, RP0
PIE1, SSPIE
STATUS, RP0
INTCON, GIE
DataByte
SSPBUF
CKP
; Bank 0
; Clear status bits
; Set up SPI port, Master mode, CLK/16,
;
;
; Bank 1
; Bank 0
; Enable, enabled interrupts
; Data to be Transmitted
;
; Start Transmission
; Enable SSP interrupt
1
0
Data xmit on rising edge
Data sampled in middle
Could move data from RAM location
SSP Module
CKE
0
0
Table
Section 16. BSSP
16-4, improper SPI communication should
SMP
0
0
DS31016A-page 16-23
Table
16-4, the
16
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