ATMEGA168-15MZ Atmel, ATMEGA168-15MZ Datasheet - Page 220

• Manufacturer Part Number: ATMEGA168-15MZ
• Description: MCU AVR 16K FLASH 15MHZ 32-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168-15MZ

• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Program Memory Size: 16KB (16K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: 2-Wire, SPI, USART, Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

220
ATmega48/88/168 Automotive
After a repeated START condition (state 0x10) the 2-wire Serial Interface can access the same
Slave again, or a new Slave without transmitting a STOP condition. Repeated START enables
the Master to switch between Slaves, Master Transmitter mode and Master Receiver mode with-
out losing control of the bus.
Table 19-3.
Status
Code
(TWSR)
Prescaler
Bits
are 0
0x08
0x10
0x18
0x20
0x28
0x30
0x38
Status of the 2-wire Se-
rial Bus and 2-wire Seri-
al Interface Hardware
A START condition has
been transmitted
A
condition
transmitted
SLA+W
transmitted;
ACK has been received
SLA+W
transmitted;
NOT ACK has been re-
ceived
Data byte has been
transmitted;
ACK has been received
Data byte has been
transmitted;
NOT ACK has been re-
ceived
Arbitration
SLA+W or data bytes
Status codes for Master Transmitter Mode
repeated
has
has
has
lost
START
been
been
been
in
To/from
TWDR
Load SLA+W
Load SLA+W
or
Load SLA+R
Load
byte or
No TWDR ac-
tion or
No TWDR ac-
tion or
No TWDR ac-
tion
Load
byte or
No TWDR ac-
tion or
No TWDR ac-
tion or
No TWDR ac-
tion
Load
byte or
No TWDR ac-
tion or
No TWDR ac-
tion or
No TWDR ac-
tion
Load
byte or
No TWDR ac-
tion or
No TWDR ac-
tion or
No TWDR ac-
tion
No TWDR ac-
tion or
No TWDR ac-
tion
Application Software Response
data
data
data
data
ST
A
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ST
O
To TWCR
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
TWI
NT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TW
EA
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Next Action Taken by TWI Hardware
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+W will be transmitted;
ACK or NOT ACK will be received
SLA+R will be transmitted;
Logic will switch to Master Receiver mode
Data byte will be transmitted and ACK or
NOT ACK will be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START con-
dition will be transmitted and TWSTO Flag
will be reset
Data byte will be transmitted and ACK or
NOT ACK will be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START con-
dition will be transmitted and TWSTO Flag
will be reset
Data byte will be transmitted and ACK or
NOT ACK will be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START con-
dition will be transmitted and TWSTO Flag
will be reset
Data byte will be transmitted and ACK or
NOT ACK will be received
Repeated START will be transmitted
STOP condition will be transmitted and
TWSTO Flag will be reset
STOP condition followed by a START con-
dition will be transmitted and TWSTO Flag
will be reset
2-wire Serial Bus will be released and not
addressed Slave mode entered
A START condition will be transmitted
when the bus becomes free
7530I–AVR–02/10