DSPIC33FJ128GP708-E/PT Microchip Technology, DSPIC33FJ128GP708-E/PT Datasheet - Page 233
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DSPIC33FJ128GP708-E/PT
Manufacturer Part Number
DSPIC33FJ128GP708-E/PT
Description
IC DSPIC MCU/DSP 128K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64GP206-IPT.pdf
(322 pages)
3.DSPIC33FJ64GP206-IPT.pdf
(28 pages)
Specifications of DSPIC33FJ128GP708-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
For Use With
DM300024 - KIT DEMO DSPICDEM 1.1DV164033 - KIT START EXPLORER 16 MPLAB ICD2MA330012 - MODULE DSPIC33 100P TO 84QFPMA330011 - MODULE DSPIC33 100P TO 100QFPDM300019 - BOARD DEMO DSPICDEM 80L STARTERDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164328 - MODULE SKT FOR 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- DSPIC33FJ12GP201-ISO PDF datasheet
- DSPIC33FJ64GP206-IPT PDF datasheet #2
- DSPIC33FJ64GP206-IPT PDF datasheet #3
- Current page: 233 of 322
- Download datasheet (5Mb)
REGISTER 21-3:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-8
bit 7-0
Note 1: This bit only used if ADxCON1<SSRC> = 1.
R/W-0
ADRC
R/W-0
2: This bit is not used if ADxCON3<ADRC> = 1.
ADRC: ADC Conversion Clock Source bit
1 = ADC internal RC clock
0 = Clock derived from system clock
Unimplemented: Read as ‘0’
SAMC<4:0>: Auto Sample Time bits
11111 = 31 T
•
•
•
00001 = 1 T
00000 = 0 T
ADCS<7:0>: ADC Conversion Clock Select bits
11111111 = Reserved
•
•
•
01000000 = Reserved
00111111 = T
•
•
•
00000010 = T
00000001 = T
00000000 = T
R/W-0
U-0
—
ADxCON3: ADCx CONTROL REGISTER 3
AD
AD
AD
W = Writable bit
‘1’ = Bit is set
CY
CY
CY
CY
· (ADCS<7:0> + 1) = 64 · T
· (ADCS<7:0> + 1) = 3 · T
· (ADCS<7:0> + 1) = 2 · T
· (ADCS<7:0> + 1) = 1 · T
R/W-0
U-0
—
dsPIC33FJXXXGPX06/X08/X10
R/W-0
R/W-0
ADCS<7:0>
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CY
CY
CY
CY
R/W-0
R/W-0
(2)
(2)
= T
= T
= T
= T
AD
AD
AD
AD
SAMC<4:0>
R/W-0
R/W-0
(1)
x = Bit is unknown
R/W-0
R/W-0
DS70286C-page 231
R/W-0
R/W-0
bit 8
bit 0
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