AT89C51RC2-SLSUL Atmel, AT89C51RC2-SLSUL Datasheet - Page 55

• Manufacturer Part Number: AT89C51RC2-SLSUL
• Description: IC 8051 MCU FLASH 32K 44PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RC2-SLSUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 80C51
• Family Name: AT89
• Maximum Speed: 40 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Interrupt System
Figure 22. Interrupt Control System
4180E–8051–10/06
EXF2
KBD IT
SPI IT
INT0
INT1
PCA IT
TF0
TF1
TF2
RI
TI
Individual Enable
The AT89C51RB2/RC2 has a total of 9 interrupt vectors: two external interrupts (INT0
and INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt, SPI inter-
rupt, Keyboard interrupt and the PCA global interrupt. These interrupts are shown in
Figure 22.
Each of the interrupt sources can be individually enabled or disabled by setting or clear-
ing a bit in the Interrupt Enable register (Table 45 and Table 47). This register also
contains a global disable bit, which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority lev-
els by setting or clearing a bit in the Interrupt Priority register (Table 48) and in the
Interrupt Priority High register (Table 46 and Table 47) shows the bit values and priority
levels associated with each combination.
IE0
IE1
IPH, IPL
Global Disable
3
0
3
0
3
0
3
0
3
0
3
0
3
0
3
0
3
0
AT89C51RB2/RC2
High Priority
Interrupt
Interrupt
Polling
Sequence, Decreasing From
High to Low Priority
Low Priority
Interrupt
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