PIC18F458-E/P Microchip Technology, PIC18F458-E/P Datasheet - Page 93

• Manufacturer Part Number: PIC18F458-E/P
• Description: IC MCU FLASH 16KX16 W/CAN 40 DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F458-E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.5
The Reset Control (RCON) register contains the IPEN
bit which is used to enable prioritized interrupts. The
functions of the other bits in this register are discussed
in more detail in Section 4.14 “RCON Register”.
REGISTER 8-13:
© 2006 Microchip Technology Inc.
RCON Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON: RESET CONTROL REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-3.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-3.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-3.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-3.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-3.
Legend:
R = Readable bit
-n = Value at POR
R/W-0
IPEN
U-0
—
U-0
—
W = Writable bit
‘1’ = Bit is set
R/W-1
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
R-1
PD
PIC18FXX8
x = Bit is unknown
R/W-0
POR
DS41159E-page 91
R/W-0
BOR
bit 0