PIC16LF877-04I/P Microchip Technology, PIC16LF877-04I/P Datasheet - Page 25
![IC MCU FLASH 8KX14 EE A/D 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC16LF877-04I/P
Manufacturer Part Number
PIC16LF877-04I/P
Description
IC MCU FLASH 8KX14 EE A/D 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F873-04SO.pdf
(218 pages)
Specifications of PIC16LF877-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF877-04I/P
Manufacturer:
MICROCHIP
Quantity:
2 000
Company:
Part Number:
PIC16LF877-04I/PQ
Manufacturer:
MICROCHIP
Quantity:
2 000
Company:
Part Number:
PIC16LF877-04I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LF877-04I/PQ
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC16LF877-04I/PT
Manufacturer:
MICROCHIP
Quantity:
1 140
Company:
Part Number:
PIC16LF877-04I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
2.2.2.6
The PIE2 register contains the individual enable bits for
the CCP2 peripheral interrupt, the SSP bus collision
interrupt, and the EEPROM write operation interrupt.
REGISTER 2-6:
2001 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-1
bit 0
PIE2 Register
PIE2 REGISTER (ADDRESS 8Dh)
Unimplemented: Read as '0'
Reserved: Always maintain this bit clear
Unimplemented: Read as '0'
EEIE: EEPROM Write Operation Interrupt Enable
1 = Enable EE Write Interrupt
0 = Disable EE Write Interrupt
BCLIE: Bus Collision Interrupt Enable
1 = Enable Bus Collision Interrupt
0 = Disable Bus Collision Interrupt
Unimplemented: Read as '0'
CCP2IE: CCP2 Interrupt Enable bit
1 = Enables the CCP2 interrupt
0 = Disables the CCP2 interrupt
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
—
Reserved
R/W-0
U-0
—
W = Writable bit
’1’ = Bit is set
R/W-0
EEIE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
BCLIE
R/W-0
U-0
—
PIC16F87X
x = Bit is unknown
U-0
—
DS30292C-page 23
CCP2IE
R/W-0
bit 0