PIC17C43-25/PT Microchip Technology, PIC17C43-25/PT Datasheet - Page 139
PIC17C43-25/PT
Manufacturer Part Number
PIC17C43-25/PT
Description
IC MCU OTP 4KX16 PWM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C43-16P.pdf
(4 pages)
Specifications of PIC17C43-25/PT
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
8KB (4K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AC164315 - MODULE SKT MPLAB PM3 44TQFP309-1008 - ADAPTER 44-TQFP TO 40-DIPAC174005 - MODULE SKT PROMATEII 44TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C43-25/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLWT
Example1:
Example 2:
1996 Microchip Technology Inc.
Before Instruction
After Instruction (table write completion)
Before Instruction
After Instruction (table write completion)
Program
Memory
16 bits
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR - 1) =
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
REG
TBLATH
TBLATL
TBLPTR
MEMORY(TBLPTR)
Table Write
TABLWT
TABLWT
15
15
TBLPTR
TBLAT
8
0, 1, REG
1, 0, REG
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
7
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0x53
0x55
0xA357
0x5355
0x53
0xAA
0x55
0xA356
0xFFFF
0x53
0xAA
0x53
0xA356
0xAA53
0
0
Memory
8 bits
Data
TLRD
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
Program
Memory
16 bits
Decode
t
RAM
TBLAT
RAM
TBLAT
t
RAM
TBLAT
RAM
TBLAT
Q1
=
=
=
=
=
=
=
=
=
=
TBLATH or
Table Latch Read
[ label ] TLRD t,f
0
t
If t = 0,
If t = 1,
None
Read data from 16-bit table latch
(TBLAT) into file register 'f'. Table Latch
is unaffected.
If t = 1; high byte is read
If t = 0; low byte is read
This instruction is used in conjunction
with TABLRD to transfer data from pro-
gram memory to data memory.
1
1
TLRD
TBLATL
register
Read
1010
Q2
TBLATL
TBLATH
0
?
0x00AF
0xAF
0x00AF
1
?
0x00AF
0x00
0x00AF
[0,1]
f
15
15
255
TBLPTR
PIC17C4X
TBLAT
8
t, RAM
00tx
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
(TBLATH = 0x00)
(TBLATL = 0xAF)
7
Execute
f;
f
Q3
DS30412C-page 139
0
0
ffff
register 'f'
Memory
8 bits
Data
Write
Q4
ffff
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