PIC24FJ256DA110-I/PT Microchip Technology, PIC24FJ256DA110-I/PT Datasheet - Page 308
![MCU PIC 16BIT FLASH 256K 100TQFP](/photos/28/61/286177/64-tqfp_sml.jpg)
PIC24FJ256DA110-I/PT
Manufacturer Part Number
PIC24FJ256DA110-I/PT
Description
MCU PIC 16BIT FLASH 256K 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ256DA110-I/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
100-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
84
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
24 KB
Interface Type
UART, SPI, USB, I2C, RS-485, RS-232
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240001, DM240312, DV164039
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC24
No. Of I/o's
84
Ram Memory Size
24KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256DA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (4Mb)
PIC24FJ256DA210 FAMILY
REGISTER 22-4:
DS39969B-page 308
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13-12
bit 11-10
bit 9-8
bit 7-5
bit 4-3
bit 2-0
DPGWDTH1
DPBPP2
R/W-0
R/W-0
DPGWDTH<1:0>: STN Display Glass Data Width bits
11 = Reserved
10 = 16 bits wide
01 = 8 bits wide
00 = 4 bits wide
These bits have no effect on TFT mode. TFT display glass data width is always assumed to be 16 bits wide.
DPSTGER<1:0>: Display Data Timing Stagger bits
11 = Delays of the display data are staggered in groups:
10 = Even bits of the display data are delayed by 1 full GPUCLK cycle; odd bits are not delayed
01 = Odd bits of the display data are delayed by ½ GPUCLK cycle; even bits are not delayed
00 = Display data timing is all synchronized on one clock GPUCLK edge
Unimplemented: Read as ‘0’
DPTEST<1:0>: Display Test Pattern Generator bits
11 = Borders
10 = Bars
01 = Black screen
00 = Normal Display mode; test patterns are off
DPBPP<2:0>: Display bits-per-pixel Setting bits
This setting must match the GPU bits-per-pixel set in PUBPP<2:0> (G1CON1<7:5>).
100 = 16 bits-per-pixel
011 = 8 bits-per-pixel
010 = 4 bits-per-pixel
001 = 2 bits-per-pixel
000 = 1 bit-per-pixel
Other = Reserved
Unimplemented: Read as ‘0’
DPMODE<2:0>: Display Glass Type bits
011 = Color STN type
010 = Mono STN type
001 = TFT type
000 = Display off
Other = Reserved
DPGWDTH0
DPBPP1
R/W-0
R/W-0
Bit group 0: 0 4 8 12 – not delayed
Bit group 1: 1 5 9 13 – delayed by ½ GPUCLK cycle
Bit group 2: 2 6 10 14 – delayed by full GPUCLK cycle
Bit group 3: 3 7 11 15 – delayed by 1 ½ GPUCLK cycle
G1CON2: DISPLAY CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
DPSTGER1
DPBPP0
R/W-0
R/W-0
DPSTGER0
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
DPMODE2
R/W-0
U-0
—
2010 Microchip Technology Inc.
x = Bit is unknown
DPMODE1
DPTEST1
R/W-0
R/W-0
DPMODE0
DPTEST0
R/W-0
R/W-0
bit 8
bit 0
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