PIC18LF4320-I/PT Microchip Technology, PIC18LF4320-I/PT Datasheet - Page 294
![IC MCU FLASH 4KX16 EEPROM 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18LF4320-I/PT
Manufacturer Part Number
PIC18LF4320-I/PT
Description
IC MCU FLASH 4KX16 EEPROM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18F1320-ISS.pdf
(36 pages)
4.PIC18F2220-ISO.pdf
(394 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(6 pages)
7.PIC18F2220-ISO.pdf
(8 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
9.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18LF4320-I/PT
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF4320-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18LF4320-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18F1320-ISS PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- PIC18F2220-ISO PDF datasheet #9
- Current page: 294 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39599G-page 292
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1 †
0
operation
Enter Sleep mode
[ label ] SLEEP
None
00h → WDT,
0 → WDT postscaler,
1 → TO,
0 → PD
TO, PD
The Power-Down status bit (PD)
is cleared. The Time-out status bit
(TO) is set. Watchdog Timer and
its postscaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
0000
Process
Data
Q3
0000
Sleep
Go to
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
[ label ] SUBFWB
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(W) – (f) – (C) → dest
N, OV, C, DC, Z
Subtract register ‘f’ and carry flag
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored in register ‘d’ (default). If ‘a’
is ‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
1
1
SUBFWB REG
SUBFWB
SUBFWB
Subtract f from W with Borrow
Read
Q2
0101
0x03
0x02
0x01
0xFF
0x02
0x00
0x00
0x01
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
© 2007 Microchip Technology Inc.
; result is positive
; result is zero
; result is negative
01da
REG, 0, 0
REG, 1, 0
Process
Data
Q3
ffff
f [,d [,a]]
destination
Write to
Q4
ffff
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