AT32UC3A1512-AUR Atmel, AT32UC3A1512-AUR Datasheet - Page 624

• Manufacturer Part Number: AT32UC3A1512-AUR
• Description: MCU 32BIT 512KB FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A1512-AUR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

30.8.3.16
Offset:
Register Name:
Access Type:
Reset Value:
• RXINE: Received IN Data Interrupt Enable
Set by software (by setting the RXINES bit) to enable the Received IN Data interrupt (RXINE).
Clear by software (by setting the RXINEC bit) to disable the Received IN Data interrupt (RXINE).
• TXOUTE: Transmitted OUT Data Interrupt Enable
Set by software (by setting the TXOUTES bit) to enable the Transmitted OUT Data interrupt (TXOUTE).
Clear by software (by setting the TXOUTECbit) to disable the Transmitted OUT Data interrupt (TXOUTE).
• TXSTPE: Transmitted SETUP Interrupt Enable
Set by software (by setting the TXSTPES bit) to enable the Transmitted SETUP interrupt (TXSTPE).
Clear by software (by setting the TXSTPEC bit) to disable the Transmitted SETUP interrupt (TXSTPE).
• UNDERFIE: Underflow Interrupt Enable
Set by software (by setting the UNDERFIES bit) to enable the Underflow interrupt (UNDERFIE).
Clear by software (by setting the UNDERFIEC bit) to disable the Underflow interrupt (UNDERFIE).
• PERRE: Pipe Error Interrupt Enable
Set by software (by setting the PERRES bit) to enable the Pipe Error interrupt (PERRE).
Clear by software (by setting the PERREC bit) to disable the Pipe Error interrupt (PERRE).
• NAKEDE: NAKed Interrupt Enable
Set by software (by setting the NAKEDES bit) to enable the NAKed interrupt (NAKEDE).
Clear by software (by setting the NAKEDEC bit) to disable the NAKed interrupt (NAKEDE).
32058J–AVR32–04/11
PACKETIE
SHORT
31
23
15
ru
–
–
–
7
0
USB Pipe X Control Register (UPCONX)
RXSTALLDE/
CRCERRE
FIFOCON
30
22
14
ru
ru
–
–
0
6
0
OVERFIE
29
21
13
ru
–
–
–
5
0
0x05C0 + X . 0x04
UPCONX, X in [0..6]
Read-Only
0x00000000
NBUSYBKE
NAKEDE
28
20
12
ru
ru
–
–
0
4
0
PERRE
27
19
11
ru
–
–
–
3
0
UNDERFIE
TXSTPE/
RSTDT
26
18
10
ru
ru
–
0
–
2
0
PFREEZE
TXOUTE
25
17
ru
ru
–
0
9
–
1
0
AT32UC3A
PDISHDMA
RXINE
24
16
ru
ru
–
0
8
–
0
0
624