AT91SAM9G10-CU Atmel, AT91SAM9G10-CU Datasheet - Page 17

IC MCU ARM9 SAMPLING 217CBGA

AT91SAM9G10-CU

Manufacturer Part Number
AT91SAM9G10-CU
Description
IC MCU ARM9 SAMPLING 217CBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9G10-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
266MHz
Connectivity
EBI/EMI, I²C, IrDA, ISI, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Controller Family/series
AT91
No. Of I/o's
96
Ram Memory Size
16KB
Cpu Speed
266MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
EBI, SPI, TWI, USART
Maximum Clock Frequency
266 MHz
Number Of Programmable I/os
96
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9G10-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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8.1.1
Table 8-3.
Note:
8.1.1.1
8.1.1.2
8.1.1.3
8.1.1.4
8.1.2
6462AS–ATARM–03-Jun-09
Address
0x0000 0000
1. EBI NCS0 is to be connected to a 16-bit non-volatile memory. The access configuration is defined by the reset state of SMC
Internal Memory Mapping
Boot Strategies
Setup, SMC Pulse, SMC Cycle and SMC Mode CS0 registers.
Internal SRAM
Internal ROM
LCD Controller
USB Host Port
Internal Memory Mapping
Master 0: ARM926 Instruction
REMAP(RCB0) = 0
BMS = 1
Int. ROM
Table 8-3
status and the BMS state at reset.
The AT91SAM9G10 embeds a high-speed 16-Kbyte SRAM.
The AT91SAM9G10 integrates a 32-Kbyte Internal ROM mapped at address 0x0040 0000. It is
also accessible at address 0x0 after reset and before remap if the BMS is tied high during reset.
The AT91SAM9G10 integrates a USB Host Port Open Host Controller Interface (OHCI). The
registers of this interface are directly accessible on the AHB Bus and are mapped like a standard
internal memory at address 0x0050 0000.
The AT91SAM9G10 integrates an LCD Controller. The interface is directly accessible on the
AHB Bus and is mapped like a standard internal memory at address 0x0060 0000.
The system always boots at address 0x0. To ensure a maximum number of possibilities for boot,
the memory layout can be configured with two parameters.
REMAP allows the user to lay out the first internal SRAM bank to 0x0 to ease development. This
is done by software once the system has booted for each Master of the Bus Matrix. Refer to the
Bus Matrix Section for more details.
When REMAP = 0, BMS allows the user to lay out to 0x0, at his convenience, the ROM or an
external memory. This is done via hardware at reset.
Note:
The AT91SAM9G10 Bus Matrix manages a boot memory that depends on the level on the BMS
pin at reset. The internal memory area mapped between address 0x0 and 0x000F FFFF is
reserved for this purpose.
If BMS is detected at 1, the boot memory is the embedded ROM.
If BMS is detected at 0, the boot memory is the memory connected on the Chip Select 0 of the
External Bus Interface.
Memory blocks not affected by these parameters can always be seen at their specified base
addresses. See the complete memory map presented in
BMS = 0
EBI NCS0
summarizes the Internal Memory Mapping for each Master, depending on the Remap
(1)
Int. RAM C
REMAP (RCB0) = 1
Master 1: ARM926 Data
REMAP (RCB1) = 0
BMS = 1
Int. ROM
Figure 8-1 on page
BMS = 0
EBI NCS0
AT91SAM9G10
(1)
REMAP (RCB1) = 1
Int. RAM C
15.
17

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