PIC16C74A-10E/L Microchip Technology, PIC16C74A-10E/L Datasheet - Page 118
![IC MCU OTP 4KX14 A/D PWM 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16C74A-10E/L
Manufacturer Part Number
PIC16C74A-10E/L
Description
IC MCU OTP 4KX14 A/D PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16LC74A-04P.pdf
(8 pages)
Specifications of PIC16C74A-10E/L
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-PLCC
For Use With
DVA16XL441 - ADAPTER DEVICE ICE 44PLCC309-1040 - ADAPTER 44-PLCC ZIF TO 40-DIP309-1039 - ADAPTER 44-PLCC TO 40-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C74A-10E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16LC74A-04P PDF datasheet #4
- Current page: 118 of 289
- Download datasheet (3Mb)
PIC16C7X
FIGURE 13-2: ADCON1 REGISTER (ADDRESS 9Fh)
DS30390E-page 118
bit7
bit 7-3: Unimplemented: Read as '0'
bit 2-0: PCFG2:PCFG0: A/D Port Configuration Control bits
Note 1: RE0, RE1, and RE2 are implemented on the PIC16C74/74A/77 only.
U-0
—
A = Analog input
D = Digital I/O
PCFG2:PCFG0
U-0
—
000
001
010
011
100
101
11x
U-0
—
A
A
A
A
A
A
D
RA0
U-0
—
A
A
A
A
A
A
D
RA1
U-0
—
A
A
A
A
D
D
D
RA2
PCFG2
R/W-0
A
A
A
A
D
D
D
RA5
A
V
A
V
A
V
D
PCFG1
REF
REF
REF
RA3
R/W-0
A
A
D
D
D
D
D
RE0
PCFG0
R/W-0
(1)
A
D
D
bit0
RE1
A
D
D
D
(1)
1997 Microchip Technology Inc.
W = Writable bit
U = Unimplemented
- n = Value at POR reset
R = Readable bit
RE2
A
A
D
D
D
D
D
bit, read as ‘0’
(1)
V
RA3
V
RA3
V
RA3
—
V
DD
DD
DD
REF
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