PIC18LF2680-I/SP Microchip Technology, PIC18LF2680-I/SP Datasheet - Page 2
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PIC18LF2680-I/SP
Manufacturer Part Number
PIC18LF2680-I/SP
Description
IC MCU FLASH 32KX16 28SDIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4585-IPT.pdf
(482 pages)
4.PIC18F4585-IPT.pdf
(14 pages)
5.PIC18F4585-IPT.pdf
(8 pages)
6.PIC18F4585-IPT.pdf
(12 pages)
7.PIC18F4585-IPT.pdf
(4 pages)
Specifications of PIC18LF2680-I/SP
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
1024Byte
Ram Memory Size
3.25KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163011, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF2680-I/SP
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18LF2680-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2585/2680/4585/4680
5. Module: ECCP
6. Module: ECCP
7. Module: ECCP
DS80283E-page 2
The auto-shutdown source, FLT0, has inverse
polarity from the description in Section 16.4.7
“Enhanced PWM Auto-Shutdown” of the Device
Data Sheet. A logic high-voltage level on FLT0 will
generate a shutdown on ECCP1.
Work around
Invert the logic in the program’s source code.
Date Codes that pertain to this issue:
All engineering and production devices.
If a Halt command is issued while debugging with
the In-Circuit Debugger (MPLAB
ECCP module may freeze completely. However, if
a shutdown is enabled and triggered by the FLT0
pin, the ECCPASE bit is set and the outputs are
driven to their shutdown state, as defined by the
PSSAC1:PSSAC0 and PSSBD1:PSSBD0 bits,
regardless of the debugging process being
stopped.
Work around
None.
Date Codes that pertain to this issue:
In 10-Bit Addressing mode, when a Repeated Start
is issued followed by the high address byte and a
Write command, an ACK is not issued.
Work around
There are two work arounds available:
1. Single-Master Environment:
2. Multi-Master Environment:
Date Codes that pertain to this issue:
All engineering and production devices.
All engineering and production devices.
In a single-master environment, the user must
issue a Stop, then a Start, followed by a write
to the address high, then the address low
followed by the data.
In a multi-master environment, the user must
issue a Repeated Start, send a dummy Write
command to a different address, issue another
Repeated Start and then send a write to the
original address. This procedure will prevent
loss of the bus.
®
ICD 2), the
8. Module: ECCP
9. Module: ECCP and CCP
When operating either Timer1 or Timer3 as a
counter with a prescale value other than 1:1 and
operating the ECCP in Compare mode with the
Special
CCP1M3:CCP1M0 = 1011), the Special Event
Trigger Reset of the timer occurs as soon as there
is
CCPR1H:CCPR1L.
This differs from the PIC18F458, where the Special
Event Trigger Reset of the timer occurs on the next
rollover of the prescale counter, after the match
between TMRxH:TMRxL and CCPR1H:CCPR1L.
Work around
To achieve the same timer Reset period on the
PIC18F4680 family as the PIC18F458 family for a
given clock source, add 1 to the value in
CCPR1H:CCPR1L.
CCPR1H:CCPR1L = x for the PIC18F458, to
achieve the same Reset period on the PIC18F4680
family, CCPR1H:CCPR1L = x + 1, where the
prescale is 1, 2, 4 or 8 (depending on the
T1CKPS1:T1CKPS0 bit values).
Date Codes that pertain to this issue:
All engineering and production devices.
When ECCP1 and CCP2 are configured for PWM
mode with 1:1 Timer2 prescaler and duty cycle set
to the period minus 1, this may result in the PWM
output(s) remaining at a logic low level.
Clearing the PR2 register to select the fastest
period may also result in the output(s) remaining at
a logic low output level.
Work around
To ensure a reliable waveform, verify that the
selected duty cycle does not equal the 10-bit
period minus 1 prior to writing these locations, or
use 1:4 or 1:16 Timer2 prescale. Also, verify the
PR2 register is not written to 00h.
All other duty cycle and period settings will function
as described in the Device Data Sheet.
The ECCP and CCP modules remain capable of
10-bit accuracy.
Date Codes that pertain to this issue:
All engineering and production devices.
a
match
Event
between
© 2007 Microchip Technology Inc.
Trigger
In
TMRxH:TMRxL
other
(CCP1CON
words,
and
bits
if