PIC18LF6620T-I/PT Microchip Technology, PIC18LF6620T-I/PT Datasheet - Page 302
![IC MCU FLASH 32KX16 LV 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18LF6620T-I/PT
Manufacturer Part Number
PIC18LF6620T-I/PT
Description
IC MCU FLASH 32KX16 LV 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F8520T-IPT.pdf
(380 pages)
3.PIC18F8520T-IPT.pdf
(40 pages)
4.PIC18F6620-IPT.pdf
(14 pages)
5.PIC18F6620-IPT.pdf
(12 pages)
Specifications of PIC18LF6620T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF6620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F8520T-IPT PDF datasheet #2
- PIC18F8520T-IPT PDF datasheet #3
- PIC18F6620-IPT PDF datasheet #4
- PIC18F6620-IPT PDF datasheet #5
- Current page: 302 of 380
- Download datasheet (7Mb)
PIC18F6520/8520/6620/8620/6720/8720
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39609B-page 300
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
=
=
=
=
register ‘f’
Exclusive OR W with f
[ label ] XORWF
0
d
a
(W) .XOR. (f)
N, Z
Exclusive OR the contents of W
with register ‘f’. If ‘d’ is ‘0’, the result
is stored in W. If ‘d’ is ‘1’, the result
is stored back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the
BSR value (default).
1
1
XORWF
Read
0001
Q2
0xAF
0xB5
0x1A
0xB5
f
[0,1]
[0,1]
255
REG, 1, 0
10da
Process
Data
Q3
dest
ffff
f [,d [,a]
destination
Write to
Q4
ffff
2004 Microchip Technology Inc.
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