PIC18LF8620T-I/PT Microchip Technology, PIC18LF8620T-I/PT Datasheet - Page 291

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PIC18LF8620T-I/PT

Manufacturer Part Number
PIC18LF8620T-I/PT
Description
IC MCU FLASH 32KX16 LV 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF8620T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Core
PIC
Processor Series
PIC18LF
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
3840 B
Data Rom Size
1024 B
On-chip Adc
16 bit
Number Of Programmable I/os
68
Number Of Timers
2 x 8 bit
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
Height
1 mm
Interface Type
I2C, SPI, USART
Length
12 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
12 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8620T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
RCALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC =
PC =
TOS =
Q1
No
PIC18F6520/8520/6620/8620/6720/8720
Address (HERE)
Address (Jump)
Address (HERE+2)
Read literal
Push PC to
operation
Relative Call
[ label ] RCALL
-1024
(PC) + 2
(PC) + 2 + 2n
None
Subroutine call with a jump up to
1K from the current location. First,
return address (PC+2) is pushed
onto the stack. Then, add the 2’s
complement number ‘2n’ to the PC.
Since the PC will have incremented
to fetch the next instruction, the
new address will be PC+2+2n. This
instruction is a two-cycle
instruction.
1
2
HERE
stack
1101
Q2
No
‘n’
n
RCALL
1nnn
1023
TOS,
operation
Process
Data
Q3
No
PC
Jump
n
nnnn
Write to PC
operation
Q4
No
nnnn
RESET
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
After Instruction
Decode
Registers =
Flags*
Q1
=
Reset
[ label ]
None
Reset all registers and flags that
are affected by a MCLR Reset.
All
This instruction provides a way to
execute a MCLR Reset in software.
1
1
RESET
Reset
Start
0000
Q2
Reset Value
Reset Value
RESET
0000
operation
Q3
No
DS39609B-page 289
1111
operation
Q4
No
1111

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