AT32UC3B1256-AUT Atmel, AT32UC3B1256-AUT Datasheet - Page 340
![IC MCU AVR32 256KB FLASH 48-TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3B1256-AUT
Manufacturer Part Number
AT32UC3B1256-AUT
Description
IC MCU AVR32 256KB FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B1256-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
AVR UC3
No. Of I/o's
28
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B1256-AUT
Manufacturer:
ATMEL
Quantity:
1 000
- Current page: 340 of 692
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21.7.2
Name:
Access Type:
Offset:
Reset Value:
This register can only be written if the WPEN bit is cleared in the Write Protect Mode Register (if exists).
•
•
•
•
•
•
•
•
•
32059K–03/2011
ONEBIT: Start Frame Delimiter Selector
MODSYNC: Manchester Synchronization Mode
MAN: Manchester Encoder/Decoder Enable
FILTER: Infrared Receive Line Filter
MAX_ITERATION
VAR_SYNC: Variable Synchronization of Command/Data Sync Start Frame Delimiter
DSNACK: Disable Successive NACK
INACK: Inhibit Non Acknowledge
OVER: Oversampling Mode
ONEBIT
31
23
15
–
7
0: Start Frame delimiter is COMMAND or DATA SYNC.
1: Start Frame delimiter is One Bit.
0:The Manchester Start bit is a 0 to 1 transition
1: The Manchester Start bit is a 1 to 0 transition.
0: Manchester Encoder/Decoder are disabled.
1: Manchester Encoder/Decoder are enabled.
0: The USART does not filter the receive line.
1: The USART filters the receive line using a three-sample filter (1/16-bit clock) (2 over 3 majority).
Defines the maximum number of iterations in mode ISO7816, protocol T= 0.
0: User defined configuration of command or data sync field depending on SYNC value.
1: The sync field is updated when a character is written into THR register.
0: NACK is sent on the ISO line as soon as a parity error occurs in the received character (unless INACK is set).
1: Successive parity errors are counted up to the value specified in the MAX_ITERATION field. These parity errors generate a
0: The NACK is generated.
1: The NACK is not generated.
0: 16x Oversampling.
1: 8x Oversampling.
NACK on the ISO line. As soon as this value is reached, no additional NACK is sent on the ISO line. The flag ITERATION is
asserted.
Mode Register
CHMODE
CHRL
VAR_SYNC
MODSYNC
30
22
14
MR
Read-write
0x4
-
6
DSNACK
MAN
29
21
13
5
NBSTOP
USCLKS
FILTER
INACK
28
20
12
4
OVER
27
19
11
–
3
CLKO
PAR
26
18
10
2
MODE
MAX_ITERATION
MODE9
25
17
9
1
AT32UC3B
SYNC/CPHA
MSBF/CPOL
24
16
8
0
340
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