PIC17LC756AT-08I/PT Microchip Technology, PIC17LC756AT-08I/PT Datasheet - Page 227
PIC17LC756AT-08I/PT
Manufacturer Part Number
PIC17LC756AT-08I/PT
Description
IC MCU OTP 16KX16 A/D 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Specifications of PIC17LC756AT-08I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC17LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Data Rom Size
902 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC17LC756AT08IPT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17LC756AT-08I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Company:
Part Number:
PIC17LC756AT-08I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
2000 Microchip Technology Inc.
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ’f’
Swap f
[ label ] SWAPF f,d
0
d
f<3:0>
f<7:4>
None
The upper and lower nibbles of register
’f’ are exchanged. If ’d’ is 0, the result is
placed in WREG. If ’d’ is 1, the result is
placed in register ’f’.
1
1
SWAPF
Read
0001
Q2
0x53
0x35
f
[0,1]
255
REG,
dest<7:4>;
dest<3:0>
110d
Process
Data
Q3
0
ffff
destination
Write to
Q4
ffff
TABLRD
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
operation
Decode
Q1
No
(Table Pointer
on Address
TBLATH or
operation
TBLATL
register
Table Read
[ label ] TABLRD t,i,f
0
i
t
If t = 1,
TBLATH
If t = 0,
TBLATL
Prog Mem (TBLPTR)
If i = 1,
TBLPTR + 1
If i = 0,
TBLPTR is unchanged
None
1.
2.
3.
1
2 (3-cycle if f = PCL)
Read
bus)
Q2
No
1010
[0,1]
[0,1]
f
A byte of the table latch (TBLAT)
is moved to register file ’f’.
If t = 1: the high byte is moved;
If t = 0: the low byte is moved.
Then, the contents of the pro-
gram memory location pointed to
by the 16-bit Table Pointer
(TBLPTR) are loaded into the
16-bit Table Latch (TBLAT).
If i = 1: TBLPTR is incremented;
If i = 0: TBLPTR is not
PIC17C7XX
255
10ti
operation
f;
incremented.
Process
f;
Data
Q3
No
TBLPTR
DS30289B-page 227
ffff
(OE goes low)
register ’f’
operation
TBLAT;
Write
Q4
No
ffff
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