PIC16C433/JW Microchip Technology, PIC16C433/JW Datasheet - Page 13
PIC16C433/JW
Manufacturer Part Number
PIC16C433/JW
Description
IC MCU 2KX14 LIN TXRX 18CDIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C433/JW
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN (Local Interconnect Network)
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
EPROM, UV
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
18-CDIP (0.300", 7.62mm) Window
For Use With
DVA16XP185 - ADAPTER DEVICE ICE 18DIP/SOICAC164030 - MODULE SKT PROMATEII 28DIP/SOICDVA16XP140 - ADAPTER DEVICE FOR MPLAB-ICE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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4.0
4.1
The PIC16C433 has a 13-bit program counter capable
of addressing an 8K x 14 program memory space.
For the PIC16C433, the first 2K x 14 (0000h-07FFh) is
implemented. Accessing a location above the physi-
cally implemented address will cause a wraparound.
The RESET Vector is at 0000h and the interrupt vector
is at 0004h.
FIGURE 4-1:
2002 Microchip Technology Inc.
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
Peripheral Interrupt Vector
On-Chip Program
PIC16C433 PROGRAM
MEMORY MAP AND STACK
Stack Level 1
Stack Level 8
RESET Vector
Memory
PC<12:0>
13
03FFh
0400h
0000h
0004h
0005h
07FFh
0800h
1FFFh
Preliminary
4.2
The data memory is partitioned into two banks, which
contain the General Purpose Registers and the Special
Function Registers. Bit RP0 is the bank select bit.
RP0 (STATUS<5>) = 1 → Bank 1
RP0 (STATUS<5>) = 0 → Bank 0
Each Bank extends up to 7Fh (128 bytes). The lower
locations of each Bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers implemented as
static RAM. Both Bank 0 and Bank 1 contain Special
Function Registers. Some "high use" Special Function
Registers from Bank 0 are mirrored in Bank 1 for code
reduction and quicker access.
Also note that F0h through FFh on the PIC16C433 is
mapped into Bank 0 registers 70h-7Fh as common
RAM.
4.2.1
The register file can be accessed either directly or indi-
rectly
(Section 4.5).
through
Data Memory Organization
GENERAL PURPOSE REGISTER FILE
the
File
PIC16C433
Select
DS41139B-page 11
Register
FSR
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