PIC18C658-E/L Microchip Technology, PIC18C658-E/L Datasheet - Page 75
![IC MCU OTP 16KX16 CAN 68PLCC](/photos/12/13/121323/c04-049_l_sml.jpg)
PIC18C658-E/L
Manufacturer Part Number
PIC18C658-E/L
Description
IC MCU OTP 16KX16 CAN 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658-E/L
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
68-PLCC
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18XL680 - ADAPTER DEVICE ICE 68PLCCAC174007 - MODULE SKT PROMATEII 68PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18C658E/L
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C658-E/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 75 of 366
- Download datasheet (7Mb)
7.0
The PIC18CXX8 devices have multiple interrupt
sources and an interrupt priority feature that allows
each interrupt source to be assigned a high priority
level or a low priority level. The high priority interrupt
vector is at 000008h and the low priority interrupt vector
is at 000018h. High priority interrupt events will over-
ride any low priority interrupts that may be in progress.
There are 13 registers that are used to control interrupt
operation. These registers are:
It is recommended that the Microchip header files sup-
plied with MPLAB be used for the symbolic bit names
in these registers. This allows the assembler/compiler
to automatically take care of the placement of these
bits within the specified register.
Each interrupt source has three bits to control its oper-
ation. The functions of these bits are:
The interrupt priority feature is enabled by setting the
IPEN bit (RCON register). When interrupt priority is
enabled, there are two bits that enable interrupts glo-
bally. Setting the GIEH bit (INTCON register) enables
all interrupts that have the priority bit set. Setting the
GIEL bit (INTCON register) enables all interrupts that
have the priority bit cleared. When the interrupt flag,
enable bit and appropriate global interrupt enable bit
are set, the interrupt will vector immediately to address
000008h or 000018h, depending on the priority level.
Individual interrupts can be disabled through their cor-
responding enable bits.
2000 Microchip Technology Inc.
• RCON
• INTCON
• INTCON2
• INTCON3
• PIR1, PIR2, PIR3
• PIE1, PIE2, PIE3
• IPR1, IPR2, IPR3
• Flag bit to indicate that an interrupt event
• Enable bit that allows program execution to
• Priority bit to select high priority or low priority
occurred
branch to the interrupt vector address when
the flag bit is set
INTERRUPTS
Advanced Information
When the IPEN bit is cleared (default state), the inter-
rupt priority feature is disabled and interrupts are com-
patible
Compatibility mode, the interrupt priority bits for each
source have no effect. The PEIE bit (INTCON register)
enables/disables all peripheral interrupt sources. The
GIE bit (INTCON register) enables/disables all interrupt
sources. All interrupts branch to address 000008h in
Compatibility mode.
When an interrupt is responded to, the Global Interrupt
Enable bit is cleared to disable further interrupts. If the
IPEN bit is cleared, this is the GIE bit. If interrupt prior-
ity levels are used, this will be either the GIEH or GIEL
bit. High priority interrupt sources can interrupt a low
priority interrupt.
The return address is pushed onto the stack and the
PC is loaded with the interrupt vector address
(000008h or 000018h). Once in the interrupt service
routine, the source(s) of the interrupt can be deter-
mined by polling the interrupt flag bits. The interrupt
flag bits must be cleared in software before re-enabling
interrupts to avoid recursive interrupts.
The "return from interrupt" instruction, RETFIE, exits
the interrupt routine and sets the GIE bit (GIEH or GIEL
if priority levels are used), which re-enables interrupts.
For external interrupt events, such as the INT pins or
the PORTB input change interrupt, the interrupt latency
will be three to four instruction cycles. The exact
latency is the same for one or two cycle instructions.
Individual interrupt flag bits are set, regardless of the
status of their corresponding enable bit or the GIE bit.
with
PICmicro
PIC18CXX8
®
mid-range
DS30475A-page 75
devices.
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