W78L801A24LL Nuvoton Technology Corporation of America, W78L801A24LL Datasheet - Page 8
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W78L801A24LL
Manufacturer Part Number
W78L801A24LL
Description
IC MCU 8-BIT 4K ROM 48-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet
1.W78L801A24LL.pdf
(24 pages)
Specifications of W78L801A24LL
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
EBI/EMI
Peripherals
LED, WDT
Number Of I /o
36
Program Memory Size
4KB (4K x 8)
Program Memory Type
Mask ROM
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W78L801A24LL
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
is set to 1. i.e. User’s applications should elude the ALE pulses before software configure it with I/O
port P4.5.
6.1
The W78L801 has twelve interrupt sources: INT0 and INT1 ; Timer 0,1; INT2 to INT9. Each interrupt
vectors to a specific location in program memory for its interrupt service routine. Each of these
sources can be individually enabled or disabled by setting or clearing the corresponding bit in Special
Function Register IE0 and IE1. The individual interrupt priority level depends on the Interrupt Priority
Register IP0 and IP1. Additional external interrupts INT2 to INT9 are level sensitive and may be used
to awake the device from power down mode. The Port 1 interrupts can be initialized to either active
HIGH or LOW via setting the Interrupt Polarity Register IX. The IRQ register contains the flags of Port
1 interrupts. Each flag in IRQ register will be set when an interrupt request is recognized but must be
cleared by software . Note that the interrupt flags have to be cleared before the interrupt service
routine is completed, or else another interrupt will be generated.
Interrupt Enable Register 0
Interrupt Enable Register 1
EA : Global enable. Enable/disable all interrupts.
ET1: Enable Timer 1 interrupt
EX1: Enable external interrupt 1
ET0: Enable Timer 0 interrupt
EX0: Enable external interrupt 0
EX9: Enable external interrupt 9
EX8: Enable external interrupt 8
EX7: Enable external interrupt 7
EX6: Enable external interrupt 6
EX5: Enable external interrupt 5
EX4: Enable external interrupt 4
EX3: Enable external interrupt 3
EX2: Enable external interrupt 2
Interrupt System
Bit:
Bit:
Bit:
Mnemonic: P4
EX9
Mnemonic: IE
Mnemonic: IE1
EA
7
7
7
-
P4.6
EX8
6
6
6
-
P4.5
EX7
- 8 -
5
5
5
-
EX6
Address: A8H
Address: E8H
4
4
4
-
-
Address: D8H
P4.3
ET1
EX5
3
3
3
P4.2
EX1
EX4
2
2
2
P4.1
EX3
ET0
W78L801
1
1
1
P4.0
EX0
EX2
0
0
0