Z8F011AQB020SC Zilog, Z8F011AQB020SC Datasheet - Page 70
Z8F011AQB020SC
Manufacturer Part Number
Z8F011AQB020SC
Description
IC ENCORE XP MCU FLASH 1K 8-QFN
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F011AQB020SC
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-VQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
269-3645
- Current page: 70 of 282
- Download datasheet (4Mb)
PS022825-0908
Caution:
Caution:
Caution:
Caution:
Software Interrupt Assertion
Watchdog Timer Interrupt Assertion
Program code can generate interrupts directly. Writing a 1 to the correct bit in the Interrupt
Request register triggers an interrupt (assuming that interrupt is enabled). When the inter-
rupt request is acknowledged by the eZ8 CPU, the bit in the Interrupt Request register is
automatically cleared to 0.
The Watchdog Timer interrupt behavior is different from interrupts generated by other
sources. The Watchdog Timer continues to assert an interrupt as long as the timeout
condition continues. As it operates on a different (and usually slower) clock domain than
the rest of the device, the Watchdog Timer continues to assert this interrupt for many
system clocks until the counter rolls over.
The following coding style that clears bits in the Interrupt Request registers is not
recommended. All incoming interrupts received between execution of the first
mand and the final LDX command are lost.
The following coding style used to generate software interrupts by setting bits in the
Interrupt Request registers is not recommended. All incoming interrupts received be-
tween execution of the first LDX command and the final LDX command are lost.
To avoid missing interrupts, use the following coding style to set bits in the Interrupt
Request registers:
Interrupt Request 0 register:
To avoid missing interrupts, use the following coding style to clear bits in the
Poor coding style that can result in lost interrupt requests:
Good coding style that avoids lost interrupt requests:
Poor coding style that can result in lost interrupt requests:
Good coding style that avoids lost interrupt requests:
LDX r0, IRQ0
AND r0, MASK
LDX IRQ0, r0
ANDX IRQ0, MASK
LDX r0, IRQ0
OR r0, MASK
LDX IRQ0, r0
ORX IRQ0, MASK
Z8 Encore! XP
Product Specification
®
Interrupt Controller
F082A Series
LDX
com-
59
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