Z86E0208HSG1925 Zilog, Z86E0208HSG1925 Datasheet - Page 40

IC Z8 .5K OTP 8MHZ 20-SSOP

Z86E0208HSG1925

Manufacturer Part Number
Z86E0208HSG1925
Description
IC Z8 .5K OTP 8MHZ 20-SSOP
Manufacturer
Zilog
Series
Z8®r
Datasheet

Specifications of Z86E0208HSG1925

Core Processor
Z8
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
14
Program Memory Size
512B (512 x 8)
Program Memory Type
OTP
Ram Size
61 x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Processor Series
Z86E02x
Core
Z8
Data Bus Width
8 bit
Data Ram Size
61 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
14
Number Of Timers
1
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
269-3946
Z86E0208HSG1925

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z86E0208HSG1925
Manufacturer:
Zilog
Quantity:
864
PS014802-0903
Hardware Work Around on the on the Z86CCP01ZEM Emulator
to P32 Rising Edge Digital Interrupt
Hardware Work Around on the on the Z86CCP01ZEM Emulator
to P32 Rising Edge Analog Interrupt
Note:
When more than one interrupt is pending, priorities are resolved by a programma-
ble priority encoder that is controlled by the Interrupt Priority register. All Z8
rupts are vectored through locations in program memory. When an interrupt
machine cycle is activated, an Interrupt Request is granted, thus disabling all sub-
sequent interrupts, saving the Program Counter and Status Flags, and then
branching to the program memory vector location reserved for that interrupt. This
memory location and the next byte contain the 16-bit starting address of the inter-
rupt service routine for that particular interrupt request.
To accommodate polled interrupt systems, interrupt inputs are masked and the
interrupt request register is polled to determine which of the interrupt requests
requires service.
To emulate the P32 rising edge digital interrupt the emulator must be modified in
the following way:
1. Connect P32 by soldering a wire jumper from either emulation socket (P3, pin
2. Connect 74HCT04 U27 pin 2 by soldering a wire jumper from U27 pin 2 to P30
To emulate the P32 rising edge analog interrupt the emulator must be modified in
the following way:
1. Connect P32 by soldering a wire jumper from either emulation socket (P2, pin
2. Connect 74HCT04 U27 pin 2 by soldering a wire jumper from U27 pin 2 to P30
The following routine must be added to the initialization of the device:
17) or (P2, pin 12) to 74HCT04 U27 pin 1.
on either emulator socket (P3, pin 25) or (P2, pin 18).
16) or (P1, pin 23) to 74HCT04 U27 pin 1.
on either emulator socket (P3, pin 25) or (P2, pin 18).
HSWP32AFIX
The rising edge interrupt is not supported. on the CCP emulator
(a hardware/software work around must be employed).
Push RP
LD RP, #0Fh
LD R0, #0FFh
POP RP
General-Purpose OTP MCU with 14 I/O Lines
Z86E02 SL 1925
®
inter-
34

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