Z8F082AHH020SG2156 Zilog, Z8F082AHH020SG2156 Datasheet - Page 12

• Manufacturer Part Number: Z8F082AHH020SG2156
• Description: IC ENCORE XP MCU FLASH 8K
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F082AHH020SG2156

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: Q5278375

FETCH UNIT
UM012811-0904
INSTRUCTION STATE MACHINE
Figure 1. eZ8 CPU Block Diagram
The Fetch Unit controls the memory interface. Its primary function is to fetch opcodes and
operands from memory. The Fetch Unit also fetches interrupt vectors or reads and writes
memory in the Program or Data Memory.
The Fetch Unit performs a partial decoding of the opcode to determine the number of
bytes to fetch for the operation. The Fetch Unit operation sequence follows:
1. Fetch the opcode
2. Determine the operand size (number of bytes)
3. Fetch the operands
4. Present the opcode and operands to the Instruction State Machine.
The Fetch Unit is pipelined and operates semi-independently from the rest of the eZ8
CPU.
The Instruction State Machine is the controller for the eZ8 CPU Execution Unit. After the
initial operation decode by the Fetch Unit, the Instruction State Machine takes over and
completes the instruction. The Instruction State Machine performs register read and write
operations and generates addresses.
Program
Counter
Fetch Unit
Arithmetic Logic Unit
State Machine
Instruction
CPU Control
Registers
Architectural Overview
User Manual
eZ8 CPU
2