ZLP32300H4808G Zilog, ZLP32300H4808G Datasheet - Page 49

• Manufacturer Part Number: ZLP32300H4808G
• Description: IC CRIMZON Z8 MCU OTP 8K 48SSOP
• Manufacturer: Zilog
• Series: Crimzon™ ZLPr

Specifications of ZLP32300H4808G

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: Brown-out Detect/Reset, HLVD, POR, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 237 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-SSOP
• Data Bus Width: 8 bit
• Data Ram Size: 237 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• For Use With: 269-4665 - KIT REMOTE UNVRSL USA 6-FUNCTION
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4508; ZLP32300H4808G

PS020823-0208
Table 11. Interrupt Types, Sources, and Vectors
When more than one interrupt is pending, priorities are resolved by a programmable
priority encoder controlled by the Interrupt Priority Register. An interrupt machine cycle
activates when an interrupt request is granted. As a result, all subsequent interrupts are
disabled, and the Program Counter and Status Flags are saved. The cycle then branches to
the program memory vector location reserved for that interrupt. All Crimzon ZLP32300
interrupts are vectored through locations in the program memory. This memory location
and the next byte contain the 16-bit address of the interrupt service routine for that
particular interrupt request. To accommodate polled interrupt systems, interrupt inputs are
masked, and the Interrupt Request register is polled to determine which of the interrupt
requests require service.
An interrupt resulting from AN1 is mapped into IRQ2, and an interrupt from AN2 is
mapped into IRQ0. Interrupts IRQ2 and IRQ0 can be rising, falling, or both edge
triggered. These interrupts are programmable. The software can poll to identify the state of
the pin.
Programming bits for the Interrupt Edge Select are located in the IRQ Register (R250),
bits D7 and D6. The configuration is indicated in
Table 12. IRQ Register
Name
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
D7
0
0
1
1
Note: F = Falling Edge; R = Rising Edge
IRQ
D6
0
1
0
1
Source
P32
P33
P31, T
T16
T8
LVD
IRQ2 (P31)
F
F
R
R/F
IN
Interrupt Edge
Vector Location
0,1
2,3
4,5
6,7
8,9
10,11
IRQ0 (P32)
F
R
F
R/F
Comments
External (P32), Rising, Falling Edge Triggered
External (P33), Falling Edge Triggered
External (P31), Rising, Falling Edge Triggered
Internal
Internal
Internal
Table
12.
Product Specification
Crimzon
Functional Description
®
ZLP32300
45