MC9RS08KB4CTG Freescale Semiconductor, MC9RS08KB4CTG Datasheet - Page 8

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MC9RS08KB4CTG

Manufacturer Part Number
MC9RS08KB4CTG
Description
MCU 8-BIT 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
RS08r
Datasheet

Specifications of MC9RS08KB4CTG

Core Processor
RS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
14
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
126 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
RS08KB
Core
RS08
Development Tools By Supplier
DEMO9RS08KB12
Package
16TSSOP
Family Name
RS08
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
14
Interface Type
SCI
On-chip Adc
12-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Electrical Characteristics
For most applications, P
(if P
Solving
where K is a constant pertaining to the particular part. K can be determined from
P
solving
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
During the device qualification ESD stresses were performed for the human body model (HBM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
8
D
(at equilibrium) for a known T
I/O
is neglected) is:
Equation 1
Equation 1
ESD Protection and Latch-Up Immunity
Latch-up
Human
Model
body
and
and
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Equation 2
I/O
Equation 2
<< P
Table 5. ESD and Latch-Up Test Conditions
MC9RS08KB12 Series MCU Data Sheet, Rev. 3
int
Description
K = P
A
and can be neglected. An approximate relationship between PD and TJ
iteratively for any value of T
. Using this value of K, the values of P
for K gives:
D
P
× (T
D
= K ÷ (T
A
+ 273°C) + θ
J
+ 273°C)
Symbol
JA
R1
C
× (PD)
A
2
.
Value
1500
–2.5
100
7.5
D
1
and T
Equation 3
J
can be obtained by
Freescale Semiconductor
Unit
pF
Ω
V
V
by measuring
Eqn. 2
Eqn. 3

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