MC9S08QG8CDNER Freescale Semiconductor, MC9S08QG8CDNER Datasheet - Page 17

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MC9S08QG8CDNER

Manufacturer Part Number
MC9S08QG8CDNER
Description
IC MCU 8K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG8CDNER

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
MC9S08QG8CDNERTR
Section Number
14.1 Introduction ................................................................................................................................... 191
14.2 Register Definition ........................................................................................................................ 197
14.3 Functional Description .................................................................................................................. 204
14.4 Additional SCI Functions.............................................................................................................. 208
15.1 Introduction ................................................................................................................................... 211
15.2 External Signal Description .......................................................................................................... 216
15.3 Modes of Operation....................................................................................................................... 217
15.4 Register Definition ........................................................................................................................ 217
Freescale Semiconductor
14.1.1 Features ............................................................................................................................194
14.1.2 Modes of Operation .........................................................................................................194
14.1.3 Block Diagram .................................................................................................................195
14.2.1 SCI Baud Rate Registers (SCIBDH, SCIBHL) ...............................................................197
14.2.2 SCI Control Register 1 (SCIC1) ......................................................................................198
14.2.3 SCI Control Register 2 (SCIC2) ......................................................................................199
14.2.4 SCI Status Register 1 (SCIS1) .........................................................................................200
14.2.5 SCI Status Register 2 (SCIS2) .........................................................................................202
14.2.6 SCI Control Register 3 (SCIC3) ......................................................................................202
14.2.7 SCI Data Register (SCID)................................................................................................203
14.3.1 Baud Rate Generation ......................................................................................................204
14.3.2 Transmitter Functional Description .................................................................................204
14.3.3 Receiver Functional Description .....................................................................................206
14.3.4 Interrupts and Status Flags...............................................................................................207
14.4.1 8- and 9-Bit Data Modes..................................................................................................208
14.4.2 Stop Mode Operation.......................................................................................................209
14.4.3 Loop Mode.......................................................................................................................209
14.4.4 Single-Wire Operation .....................................................................................................209
15.1.1 Features ............................................................................................................................213
15.1.2 Block Diagrams ...............................................................................................................213
15.1.3 SPI Baud Rate Generation ...............................................................................................215
15.2.1 SPSCK — SPI Serial Clock.............................................................................................216
15.2.2 MOSI — Master Data Out, Slave Data In .......................................................................216
15.2.3 MISO — Master Data In, Slave Data Out .......................................................................216
15.2.4 SS — Slave Select ...........................................................................................................216
15.3.1 SPI in Stop Modes ...........................................................................................................217
15.4.1 SPI Control Register 1 (SPIC1) .......................................................................................217
15.4.2 SPI Control Register 2 (SPIC2) .......................................................................................218
15.4.3 SPI Baud Rate Register (SPIBR).....................................................................................219
Serial Communications Interface (S08SCIV3)
Serial Peripheral Interface (S08SPIV3)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Chapter 14
Chapter 15
Title
Page
15

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