MC9S08SH4MSC Freescale Semiconductor, MC9S08SH4MSC Datasheet - Page 81
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MC9S08SH4MSC
Manufacturer Part Number
MC9S08SH4MSC
Description
IC MCU 8BIT 4K FLASH 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH4CTJ.pdf
(338 pages)
Specifications of MC9S08SH4MSC
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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1
1
2
6.6.1.2
6.6.1.3
Freescale Semiconductor
PTADD[5:0]
PTAPE[5:0]
V
Reset:
PTADD4 has no effect on the output-only PTA4 pin.
Reset:
PTAPE5 can be used to pullup PTA5 when configured as open drain output pin, however pullup will not pull pin all the way to
PTAPE4 has no effect on the output-only PTA4 pin.
DD
Field
Field
5:0
. An external pullup should be used if applications requires PTA5 to be driven to V
5:0
W
W
R
R
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
Internal Pull Enable for Port A Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTA pin. For port A pins (except for PTA5) that are configured as outputs,
these bits have no effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port A bit n.
1 Internal pull-up/pull-down device enabled for port A bit n.
Port A Data Direction Register (PTADD)
0
0
Port A Pull Enable Register (PTAPE)
0
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
Figure 6-5. Internal Pull Enable for Port A Register (PTAPE)
0
0
0
0
6
6
Figure 6-4. Port A Data Direction Register (PTADD)
Table 6-3. PTADD Register Field Descriptions
Table 6-4. PTAPE Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
PTAPE5
PTADD5
0
0
5
5
1
PTADD4
PTAPE4
NOTE
0
0
4
4
Description
Description
2
1
PTADD3
PTAPE3
3
0
3
0
PTADD2
PTAPE2
DD
Chapter 6 Parallel Input/Output Control
.
0
0
2
2
PTADD1
PTAPE1
0
0
1
1
PTADD0
PTAPE0
0
0
0
0
81
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