MC908QY4AMDWER Freescale Semiconductor, MC908QY4AMDWER Datasheet - Page 136

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MC908QY4AMDWER

Manufacturer Part Number
MC908QY4AMDWER
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QY4AMDWER

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Timer Interface Module (TIM)
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
136
MSxB
Setting MS0B causes the contents of TSC1 to be ignored by the TIM and reverts TCH1 to
general-purpose I/O.
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation. See
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin (see
Table
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is
available as a general-purpose I/O pin.
X
X
0
0
0
0
0
0
0
1
1
1
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
14-2).
MSxA
X
X
X
0
1
0
0
0
1
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
After initially enabling a TIM channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
Table 14-2. Mode, Edge, and Level Selection
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
ELSxA
Table
0
0
1
0
1
0
1
0
1
1
0
1
14-2.
Output compare
Table 14-2
Buffered output
buffered PWM
Output preset
Input capture
compare or
or PWM
Mode
NOTE
NOTE
shows how ELSxB and ELSxA work.
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Configuration
Freescale Semiconductor

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