MC9S08SH16CTJ Freescale Semiconductor, MC9S08SH16CTJ Datasheet - Page 264

MCU 8BIT 16K FLASH 20-TSSOP

MC9S08SH16CTJ

Manufacturer Part Number
MC9S08SH16CTJ
Description
MCU 8BIT 16K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08SH16CTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1KB
# I/os (max)
17
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 16 Timer/PWM Module (S08TPMV3)
264
6. Write to TPMxMODH:L registers in BDM mode
— TPMxCnVH:L = (TPMxMODH:L - 1) [SE110-TPM case 2]
— TPMxCnVH:L is changed from 0x0000 to a non-zero value [SE110-TPM case 3 and 5]
— TPMxCnVH:L is changed from a non-zero value to 0x0000 [SE110-TPM case 4]
Registers
In the TPM v3 a write to TPMxSC register in BDM mode clears the write coherency mechanism
of TPMxMODH:L registers. Instead, in the TPM v2 this coherency mechanism is not cleared when
there is a write to TPMxSC register.
In this case, the TPM v3 produces almost 100% duty cycle. Instead, the TPM v2 produces 0%
duty cycle.
In this case, the TPM v3 waits for the start of a new PWM period to begin using the new duty
cycle setting. Instead, the TPM v2 changes the channel output at the middle of the current
PWM period (when the count reaches 0x0000).
In this case, the TPM v3 finishes the current PWM period using the old duty cycle setting.
Instead, the TPM v2 finishes the current PWM period using the new duty cycle setting.
(TPMxMODH:TPMxMODL))
MC9S08SH32 Series Data Sheet, Rev. 2
PRELIMINARY
(Section 16.3.3, “TPM Counter Modulo
Freescale Semiconductor

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