MC9S08AC8CFJE Freescale Semiconductor, MC9S08AC8CFJE Datasheet - Page 233
![IC MCU 8BIT 8K FLASH 32-LQFP](/photos/12/33/123390/mc9s08ac8cfje_sml.jpg)
MC9S08AC8CFJE
Manufacturer Part Number
MC9S08AC8CFJE
Description
IC MCU 8BIT 8K FLASH 32-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC8CFGE.pdf
(336 pages)
Specifications of MC9S08AC8CFJE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Processor Series
S08AC
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AC60E, DEMOACEX, DEMOACKIT, DCF51AC256, DC9S08AC128, DC9S08AC16, DC9S08AC60, DEMO51AC256KIT
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HCS08
No. Of I/o's
22
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
3
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08AC8CFJE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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13.3.5
Freescale Semiconductor
Reset
BUSY
ARBL
RXAK
Field
IAAS
SRW
IICIF
TCF
7
6
5
4
2
1
0
W
R
IIC Data I/O Register (IIC1D)
Transfer Complete Flag. This bit is set on the completion of a byte transfer. This bit is only valid during or
immediately following a transfer to the IIC module or from the IIC module.The TCF bit is cleared by reading the
IIC1D register in receive mode or writing to the IIC1D in transmit mode.
0 Transfer in progress
1 Transfer complete
Addressed as a Slave. The IAAS bit is set when the calling address matches the programmed slave address or
when the GCAEN bit is set and a general call is received. Writing the IIC1C register clears this bit.
0 Not addressed
1 Addressed as a slave
Bus Busy. The BUSY bit indicates the status of the bus regardless of slave or master mode. The BUSY bit is set
when a start signal is detected and cleared when a stop signal is detected.
0 Bus is idle
1 Bus is busy
Arbitration Lost. This bit is set by hardware when the arbitration procedure is lost. The ARBL bit must be cleared
by software by writing a 1 to it.
0 Standard bus operation
1 Loss of arbitration
Slave Read/Write. When addressed as a slave, the SRW bit indicates the value of the R/W command bit of the
calling address sent to the master.
0 Slave receive, master writing to slave
1 Slave transmit, master reading from slave
IIC Interrupt Flag. The IICIF bit is set when an interrupt is pending. This bit must be cleared by software, by
writing a 1 to it in the interrupt routine. One of the following events can set the IICIF bit:
0 No interrupt pending
1 Interrupt pending
Receive Acknowledge. When the RXAK bit is low, it indicates an acknowledge signal has been received after
the completion of one byte of data transmission on the bus. If the RXAK bit is high it means that no acknowledge
signal is detected.
0 Acknowledge received
1 No acknowledge received
0
7
• One byte transfer completes
• Match of slave address to calling address
• Arbitration lost
0
6
Figure 13-7. IIC Data I/O Register (IIC1D)
Table 13-6. IIC1S Field Descriptions
MC9S08AC16 Series Data Sheet, Rev. 8
0
5
0
4
Description
DATA
3
0
0
2
Inter-Integrated Circuit (S08IICV2)
0
1
0
0
233
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