MC9S08SH8CTJ Freescale Semiconductor, MC9S08SH8CTJ Datasheet - Page 271
MC9S08SH8CTJ
Manufacturer Part Number
MC9S08SH8CTJ
Description
IC MCU 8BIT 8K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH4CTJ.pdf
(338 pages)
Specifications of MC9S08SH8CTJ
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
For Use With
DEMO9S08SH8 - BOARD DEMO FOR MC9S08SH FAM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Figure 17-2
The host is asynchronous to the target so there is a 0-to-1 cycle delay from the host-generated falling edge
to where the target perceives the beginning of the bit time. Ten target BDC clock cycles later, the target
senses the bit level on the BKGD pin. Typically, the host actively drives the pseudo-open-drain BKGD pin
during host-to-target transmissions to speed up rising edges. Because the target does not drive the BKGD
pin during the host-to-target transmission period, there is no need to treat the line as an open-drain signal
during this period.
Freescale Semiconductor
SYNCHRONIZATION
PERCEIVED START
(TARGET MCU)
BDC CLOCK
UNCERTAINTY
TRANSMIT 1
TRANSMIT 0
OF BIT TIME
HOST
HOST
shows an external host transmitting a logic 1 or 0 to the BKGD pin of a target HCS08 MCU.
Figure 17-2. BDC Host-to-Target Serial Bit Timing
MC9S08SH8 MCU Series Data Sheet, Rev. 3
TARGET SENSES BIT LEVEL
10 CYCLES
EARLIEST START
Chapter 17 Development Support
OF NEXT BIT
271
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