C8051F314-GQR Silicon Laboratories Inc, C8051F314-GQR Datasheet - Page 59
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C8051F314-GQR
Manufacturer Part Number
C8051F314-GQR
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Specifications of C8051F314-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
29
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
For Use With
336-1445 - ADAPTER PROGRAM TOOLSTICK F310
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F314-GQR
Manufacturer:
ST
Quantity:
15 000
Company:
Part Number:
C8051F314-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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Bits7–3: AD0SC4–0: ADC0 SAR Conversion Clock Period Bits.
Bit2:
Bits1–0: UNUSED. Read = 00b; Write = don’t care.
Bits7–0: ADC0 Data Word High-Order Bits.
Bits7–0: ADC0 Data Word Low-Order Bits.
AD0SC4
R/W
R/W
R/W
Bit7
Bit7
Bit7
SAR Conversion clock is derived from system clock by the following equation, where
AD0SC refers to the 5-bit value held in bits AD0SC4–0. SAR Conversion clock require-
ments are given in Table 5.1.
AD0LJST: ADC0 Left Justify Select.
0: Data in ADC0H:ADC0L registers are right-justified.
1: Data in ADC0H:ADC0L registers are left-justified.
For AD0LJST = 0: Bits 7–2 are the sign extension of Bit1. Bits 1–0 are the upper 2 bits of the
10-bit ADC0 Data Word.
For AD0LJST = 1: Bits 7–0 are the most-significant bits of the 10-bit ADC0 Data Word.
For AD0LJST = 0: Bits 7–0 are the lower 8 bits of the 10-bit Data Word.
For AD0LJST = 1: Bits 7–6 are the lower 2 bits of the 10-bit Data Word. Bits 5–0 will always
read ‘0’.
AD0SC
AD0SC3
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 5.4. ADC0H: ADC0 Data Word MSB
SFR Definition 5.3. ADC0CF: ADC0 Configuration
SFR Definition 5.5. ADC0L: ADC0 Data Word LSB
=
SYSCLK
--------------------- - 1
CLK
AD0SC2
R/W
R/W
R/W
Bit5
Bit5
Bit5
SAR
–
AD0SC1
R/W
R/W
R/W
Bit4
Bit4
Bit4
AD0SC0 AD0LJST
Rev. 1.7
R/W
R/W
R/W
Bit3
Bit3
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
R/W
R/W
Bit2
Bit2
Bit2
R/W
R/W
R/W
Bit1
Bit1
Bit1
-
R/W
R/W
R/W
Bit0
Bit0
Bit0
-
SFR Address:
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
Reset Value
11111000
0xBC
0xBD
0xBE
59
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