C8051F330-GMR Silicon Laboratories Inc, C8051F330-GMR Datasheet - Page 185
C8051F330-GMR
Manufacturer Part Number
C8051F330-GMR
Description
IC 8051 MCU 8K FLASH 20MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F33xr
Specifications of C8051F330-GMR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
For Use With
336-1541 - KIT TOOL EVAL SYS IN A USB STICK336-1451 - ADAPTER PROGRAM TOOLSTICK F330336-1346 - DAUGHTER CARD TOOLSTICK F330336-1264 - DEV KIT FOR C8051F330/F331
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F330-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
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18.3. Timer 3
Timer 3 is a 16-bit timer formed by two 8-bit SFRs: TMR3L (low byte) and TMR3H (high byte). Timer 3 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T3SPLIT bit (TMR3CN.3) defines
the Timer 3 operation mode.
Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the
internal oscillator drives the system clock while Timer 3 (and/or the PCA) is clocked by an external preci-
sion oscillator. Note that the external oscillator source divided by 8 is synchronized with the system clock.
18.3.1. 16-bit Timer with Auto-Reload
When T3SPLIT (TMR3CN.3) is zero, Timer 3 operates as a 16-bit timer with auto-reload. Timer 3 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 3
reload registers (TMR3RLH and TMR3RLL) is loaded into the Timer 3 register as shown in Figure 18.6,
and the Timer 3 High Byte Overflow Flag (TMR3CN.7) is set. If Timer 3 interrupts are enabled (if EIE1.7 is
set), an interrupt will be generated on each Timer 3 overflow. Additionally, if Timer 3 interrupts are enabled
and the TF3LEN bit is set (TMR3CN.5), an interrupt will be generated each time the lower 8 bits (TMR3L)
overflow from 0xFF to 0x00.
External Clock / 8
SYSCLK / 12
SYSCLK
T3XCLK
0
1
Figure 18.6. Timer 3 16-Bit Mode Block Diagram
M
T
3
H
M
T
3
L
0
1
CKCON
M
H
T
2
T
M
2
L
M
T
1
M
T
0
C
S
A
1
TR3
S
C
A
0
TCLK
Rev. 1.7
TMR3RLL TMR3RLH
TMR3L
TMR3H
C8051F330/1/2/3/4/5
Reload
To ADC
TF3CEN
T3SPLIT
TF3LEN
T3XCLK
TF3H
TF3L
TR3
Interrupt
189
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